Patents by Inventor Hsu-Hwei Chen

Hsu-Hwei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10636875
    Abstract: A semiconductor device includes a plurality of base layers. A tunneling layer is disposed on the plurality of base layers. A contact layer is disposed on the tunneling layer. An alloyed metal contact is annealed on to the contact layer. The alloyed metal contact forms a first region and a second region in the contact layer. The first region of the contact layer diffuses into the tunneling layer. The second region of the contact layer resides over the tunneling layer. The tunneling layer facilitates electron mobility of the second region.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: April 28, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Yeong-Chang Chou, Hsu-Hwei Chen, Hui Ma, Thomas R. Young, Youngmin Kim, Jansen J. Uyeda
  • Patent number: 9577083
    Abstract: A field effect transistor (FET) device including a substrate and a plurality of semiconductor layers provided on the substrate, where a top semiconductor layer is a heavily doped cap layer and another one of the semiconductor layers directly below the cap layer is a Schottky barrier layer, and where a gate recess is formed through the cap layer and into the Schottky barrier layer. The FET device also includes a gate terminal having a titanium layer, an inhibitor layer provided on the titanium layer and a gold layer provided on the inhibitor layer, where the gate terminal is formed in the recess so that the titanium layer is in contact with the Schottky barrier layer, and where the inhibitor layer is effective for preventing hydrogen gas from being dissociated into hydrogen atoms so as to reduce or prevent hydrogen poisoning of the FET device.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: February 21, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Yeong-Chang Chou, Richard Lai, Quin W. Kan, Keang H. Kho, Hsu-Hwei Chen, Matthew R. Parlee
  • Patent number: 9461159
    Abstract: A field effect transistor (FET) device including a GaAs substrate, an AlGaAs buffer layer provided on the substrate, an InGaAs channel layer provided on the buffer layer, an AlGaAs barrier layer provided on the channel layer, a GaAs undoped etch stop layer provided on the barrier layer where the undoped layer defines a depth of a gate recess in the FET device, and a heavily doped GaAs cap layer provided on the etch stop layer. The cap layer has a predetermined thickness and the thickness of the combination of the barrier layer and the undoped layer has the predetermined thickness, where the thickness of the undoped layer and the thickness of the barrier layer are selectively provided relative to each other so as to define the depth of the gate recess.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: October 4, 2016
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Yeong-Chang Chou, Sujane C. Wang, Hsu-Hwei Chen