Patents by Inventor Hsu Yang Wang

Hsu Yang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11800702
    Abstract: A method for forming a memory device includes the steps of providing a substrate, forming an isolation structure in the substrate to define a plurality of active regions in the substrate, the active regions respectively comprising two terminal portions and a central portion between the terminal portions, forming a plurality of island features on the substrate, wherein each of the island features covers two of the terminals portions respectively belonging to two of the active regions, performing a first etching process, using the island features as an etching mask to etch the substrate to define a plurality of island structures and a first recessed region surrounding the island structures on the substrate, and removing the island features to expose the island structures.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: October 24, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
  • Publication number: 20230292498
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Application
    Filed: May 18, 2023
    Publication date: September 14, 2023
    Applicants: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Patent number: 11711916
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: July 25, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Patent number: 11665888
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a semiconductor layer on a substrate; removing part of the semiconductor layer and part of the substrate to form a trench; forming a liner in the trench; removing part of the liner to form a spacer adjacent to two sides of the trench; forming a conductive layer in the trench; forming a metal layer on the conductive layer; forming a mask layer on the metal layer; and patterning the mask layer, the metal layer, and the conductive layer to form a bit line structure.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: May 30, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Wei-Lun Hsu, Hung-Lin Shih, Che-Hung Huang, Ping-Cheng Hsu, Hsu-Yang Wang
  • Publication number: 20210202492
    Abstract: A method for forming a memory device includes the steps of providing a substrate, forming an isolation structure in the substrate to define a plurality of active regions in the substrate, the active regions respectively comprising two terminal portions and a central portion between the terminal portions, forming a plurality of island features on the substrate, wherein each of the island features covers two of the terminals portions respectively belonging to two of the active regions, performing a first etching process, using the island features as an etching mask to etch the substrate to define a plurality of island structures and a first recessed region surrounding the island structures on the substrate, and removing the island features to expose the island structures.
    Type: Application
    Filed: March 16, 2021
    Publication date: July 1, 2021
    Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
  • Publication number: 20210151442
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Application
    Filed: January 29, 2021
    Publication date: May 20, 2021
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Publication number: 20210118889
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a semiconductor layer on a substrate; removing part of the semiconductor layer and part of the substrate to form a trench; forming a liner in the trench; removing part of the liner to form a spacer adjacent to two sides of the trench; forming a conductive layer in the trench; forming a metal layer on the conductive layer; forming a mask layer on the metal layer; and patterning the mask layer, the metal layer, and the conductive layer to form a bit line structure.
    Type: Application
    Filed: December 25, 2020
    Publication date: April 22, 2021
    Inventors: Wei-Lun Hsu, Hung-Lin Shih, Che-Hung Huang, Ping-Cheng Hsu, Hsu-Yang Wang
  • Patent number: 10985166
    Abstract: A method for forming a memory device is disclosed, including providing a substrate, forming an isolation structure and plural active regions in the substrate, forming a plurality of island features on the substrate respectively covering two of the terminal portions of the active regions, using the island features as an etching mask to etch the substrate to perform a first etching process to define a first recessed region and plural island structures on the substrate. The island structures respectively comprise the two terminal portions of the active regions and the first recessed region comprises the central portions of the active regions.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: April 20, 2021
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
  • Patent number: 10943909
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: March 9, 2021
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Patent number: 10910386
    Abstract: According to an embodiment of the present invention, a method for fabricating semiconductor device includes the steps of: forming a semiconductor layer on a substrate; removing part of the semiconductor layer and part of the substrate to form a trench; forming a liner in the trench; removing part of the liner to form a spacer adjacent to two sides of the trench; and forming a bit line structure in the trench.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: February 2, 2021
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Wei-Lun Hsu, Hung-Lin Shih, Che-Hung Huang, Ping-Cheng Hsu, Hsu-Yang Wang
  • Publication number: 20190341388
    Abstract: A method of forming a semiconductor memory device includes the following steps. First of all, a substrate is provided, and a plurality of gates is formed in the substrate, along a first direction. Next, a semiconductor layer is formed on the substrate, covering the gates, and a plug is then in the semiconductor layer, between two of the gates. Then, a deposition process is performed to from a stacked structure on the semiconductor layer. Finally, the stacked structure is patterned to form a plurality of bit lines, with one of the bit lines directly in contact with the plug.
    Type: Application
    Filed: June 7, 2018
    Publication date: November 7, 2019
    Inventors: Yi-Wei Chen, Hsu-Yang Wang, Chun-Chieh Chiu, Shih-Fang Tzou
  • Publication number: 20190279989
    Abstract: According to an embodiment of the present invention, a method for fabricating semiconductor device includes the steps of: forming a semiconductor layer on a substrate; removing part of the semiconductor layer and part of the substrate to form a trench; forming a liner in the trench; removing part of the liner to form a spacer adjacent to two sides of the trench; and forming a bit line structure in the trench.
    Type: Application
    Filed: April 3, 2018
    Publication date: September 12, 2019
    Inventors: Wei-Lun Hsu, Hung-Lin Shih, Che-Hung Huang, Ping-Cheng Hsu, Hsu-Yang Wang
  • Publication number: 20190189620
    Abstract: A method for forming a memory device is disclosed, including providing a substrate, forming an isolation structure and plural active regions in the substrate, forming a plurality of island features on the substrate respectively covering two of the terminal portions of the active regions, using the island features as an etching mask to etch the substrate to perform a first etching process to define a first recessed region and plural island structures on the substrate. The island structures respectively comprise the two terminal portions of the active regions and the first recessed region comprises the central portions of the active regions.
    Type: Application
    Filed: October 31, 2018
    Publication date: June 20, 2019
    Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
  • Publication number: 20100104484
    Abstract: A hydrogen mixed gas supplying apparatus, consists of: a lead flow pipe, an atomizer, a liquid storage tank and a plasma heater; wherein, the lower end of lead flow pipe is linked to the liquid storage tank through a tube such that the methanol mixed liquid stored in the liquid storage tank is lead into the lead flow pipe; at the bottom end of lead flow pipe is the atomizer that atomizes the methanol mixed liquid into mixed liquid micro particles having average diameter not over 2 ?m; lead air from one end of the lead flow pipe pushes the mixed liquid micro particles to plasma heater that dissolved the mixed liquid micro particles into hydrogen ions, hydroxide ions and the corresponding free radicals;and finally, the mixed gas of low temperature hydrogen gas, carbon monoxide, methane, carbon dioxide and nitrogen gas is then generated.
    Type: Application
    Filed: December 30, 2008
    Publication date: April 29, 2010
    Inventor: Hsu-Yang Wang
  • Patent number: 7637971
    Abstract: A hydrogen fuel supply system comprising a methanol aqueous solution particulates generator, spark-plasma heater, catalytic reactor, hydrogen separation unit, hydro-evaporating cooler, hydrogen compressor, hydrogen injection system, etc. By properly mixing methanol and water to form a methanol aqueous solution, then vibrated by a methanol aqueous solution particulates generator to form micro to nano sized particulates of aqueous-methanol, and the micro to nano sized particulates is then heated in high temperature by a spark-plasma heater, then through a catalytic reactor to form a gaseous mixture of hydrogen, carbon dioxide, and nitrogen. Then the hydrogen is separated by a hydrogen separation unit. Finally, the hydrogen is chilled by a hydro-evaporation cooler and then compressed by a hydrogen compressor. The resulting hydrogen can be supplied to hydrogen internal-combustion engines or hydrogen power generators by hydrogen injection systems.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: December 29, 2009
    Inventor: Hsu Yang Wang