Patents by Inventor Hsu-Yu Huang
Hsu-Yu Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11917784Abstract: A fixing device includes a circuit board, an insertion slot, and a fixing bracket. The circuit board has a peripheral recess, and the insertion slot is disposed on the circuit board. The fixing bracket is fixed in the peripheral recess, and the fixing bracket has a board, two lateral arms, and two guiding rails. The two lateral arms are connected to two corresponding sides of the board, and the two lateral arms are integrally formed from the board. In addition, the two guiding rails are respectively disposed at the two lateral arms, in which the two guiding rails extend towards the insertion slot.Type: GrantFiled: June 10, 2022Date of Patent: February 27, 2024Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATIONInventors: Chi-Yu Huang, Hsu-Kai Tsai
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Patent number: 11251079Abstract: A method for forming semiconductor device structure is provided. The method includes forming a gate stack over a semiconductor substrate and forming a spacer element over a sidewall of the gate stack. The method also includes forming a dielectric layer over the semiconductor substrate to surround the gate stack and the spacer element and replacing the gate stack with a metal gate stack. The method further includes forming a protection element over the metal gate stack and forming a conductive contact partially surrounded by the dielectric layer. A portion of the conductive contact is formed directly above a portion of the protection element.Type: GrantFiled: June 3, 2020Date of Patent: February 15, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hua-Li Hung, Chih-Lun Lu, Hsu-Yu Huang, Tsung-Fan Yin, Ying-Ting Hsia, Yi-Wei Chiu, Li-Te Hsu
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Publication number: 20200303255Abstract: A method for forming semiconductor device structure is provided. The method includes forming a gate stack over a semiconductor substrate and forming a spacer element over a sidewall of the gate stack. The method also includes forming a dielectric layer over the semiconductor substrate to surround the gate stack and the spacer element and replacing the gate stack with a metal gate stack. The method further includes forming a protection element over the metal gate stack and forming a conductive contact partially surrounded by the dielectric layer. A portion of the conductive contact is formed directly above a portion of the protection element.Type: ApplicationFiled: June 3, 2020Publication date: September 24, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hua-Li HUNG, Chih-Lun LU, Hsu-Yu HUANG, Tsung-Fan YIN, Ying-Ting HSIA, Yi-Wei CHIU, Li-Te HSU
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Patent number: 10692762Abstract: A semiconductor device is provided. The semiconductor device includes a gate stack over a semiconductor substrate and a spacer element over a sidewall of the gate stack. The spacer element has a lower portion and an upper portion, the lower portion has a substantially uniform width. The upper portion becomes wider along a direction from a top of the spacer element towards the lower portion, and a bottom of the upper portion is higher than a top of the gate stack. The semiconductor device also includes a dielectric layer surrounding the gate stack and the spacer element. The semiconductor device further includes a conductive contact penetrating through the dielectric layer and electrically connected to a conductive feature over the semiconductor substrate.Type: GrantFiled: September 10, 2018Date of Patent: June 23, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hua-Li Hung, Chih-Lun Lu, Hsu-Yu Huang, Tsung-Fan Yin, Ying-Ting Hsia, Yi-Wei Chiu, Li-Te Hsu
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Publication number: 20190019727Abstract: A semiconductor device is provided. The semiconductor device includes a gate stack over a semiconductor substrate and a spacer element over a sidewall of the gate stack. The spacer element has a lower portion and an upper portion, the lower portion has a substantially uniform width. The upper portion becomes wider along a direction from a top of the spacer element towards the lower portion, and a bottom of the upper portion is higher than a top of the gate stack. The semiconductor device also includes a dielectric layer surrounding the gate stack and the spacer element. The semiconductor device further includes a conductive contact penetrating through the dielectric layer and electrically connected to a conductive feature over the semiconductor substrate.Type: ApplicationFiled: September 10, 2018Publication date: January 17, 2019Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hua-Li HUNG, Chih-Lun LU, Hsu-Yu HUANG, Tsung-Fan YIN, Ying-Ting HSIA, Yi-Wei CHIU, Li-Te HSU
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Patent number: 10163465Abstract: A data receiver for a double data rate (DDR) memory includes a first stage circuit and a second stage circuit. The first stage circuit is deployed for receiving a single-ended signal from the DDR memory and converting the single-ended signal into a pair of differential signals. The second stage circuit, coupled to the first stage circuit, is deployed for receiving the differential signals from the first stage circuit and converting the differential signals into an output signal. Both of the first stage circuit and the second stage circuit are implemented in a core voltage domain.Type: GrantFiled: August 18, 2017Date of Patent: December 25, 2018Assignee: NOVATEK Microelectronics Corp.Inventors: Po-Yao Ko, Chien-Chung Chen, Hsu-Yu Huang, Chun-Po Huang
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Patent number: 10074563Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a spacer element over a sidewall of the gate stack. The spacer element is substantially free of oxygen. The semiconductor device structure also includes a dielectric layer over the semiconductor substrate, and the dielectric layer surrounds the gate stack and the spacer element. The semiconductor device structure further includes a conductive contact penetrating through the dielectric layer and electrically connected to a conductive feature over the semiconductor substrate. An angle between a sidewall of the conductive contact and a top surface of the spacer element is in a range from about 90 degrees to about 120 degrees, and the conductive contact covers a portion of the spacer element.Type: GrantFiled: July 29, 2016Date of Patent: September 11, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hua-Li Hung, Chih-Lun Lu, Hsu-Yu Huang, Tsung-Fan Yin, Ying-Ting Hsia, Yi-Wei Chiu, Li-Te Hsu
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Publication number: 20180033693Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a spacer element over a sidewall of the gate stack. The spacer element is substantially free of oxygen. The semiconductor device structure also includes a dielectric layer over the semiconductor substrate, and the dielectric layer surrounds the gate stack and the spacer element. The semiconductor device structure further includes a conductive contact penetrating through the dielectric layer and electrically connected to a conductive feature over the semiconductor substrate. An angle between a sidewall of the conductive contact and a top surface of the spacer element is in a range from about 90 degrees to about 120 degrees, and the conductive contact covers a portion of the spacer element.Type: ApplicationFiled: July 29, 2016Publication date: February 1, 2018Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hua-Li HUNG, Chih-Lun LU, Hsu-Yu HUANG, Tsung-Fan YIN, Ying-Ting HSIA, Yi-Wei CHIU, Li-Te HSU
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Publication number: 20150004769Abstract: A method of fabricating a semiconductor device is disclosed. A substrate with protrusion structures is provided. A patterned photoresist layer is formed over the substrate, including the protrusion structures. An ion-implantation is applied to the substrate, including to the patterned photoresist layer and an outer portion of the patterned photoresist layer is formed a hardened portion. A two-stage-striping process is performed to remove the patterned photoresist layer. The first stage is performing a low-temperature-dry-etch to substantially remove the hardened portion of the patterned photoresist layer. The second stage is performing a wet etch to remove the remaining patterned photoresist layer.Type: ApplicationFiled: June 28, 2013Publication date: January 1, 2015Inventors: Yi-Wei Chiu, Tzu Chan Weng, Li Te Hsu, Hsu-Yu Huang