Patents by Inventor Hsuan-Chih Wu

Hsuan-Chih Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072156
    Abstract: A semiconductor device structure and a manufacturing method thereof are provided. The semiconductor device structure includes a semiconductor substrate, semiconductor channel sheets disposed over the semiconductor substrate, and source and drain regions located beside the semiconductor channel sheets. A gate structure is disposed between the source and drain regions and disposed over the semiconductor channel sheets. The gate structure laterally surrounds the semiconductor channel sheets. The gate structure includes a top gate electrode structure disposed above the semiconductor channel sheets, and lower gate electrode structures disposed between the semiconductor channel sheets. Sidewall spacers are disposed between the gate structure and source and drain regions, and the sidewall spacers located next to the top gate electrode structure have slant sidewalls.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Huang Huang, An Chyi Wei, Ryan Chia-Jen Chen, Hsuan-Chih Wu
  • Publication number: 20230187535
    Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method for manufacturing the semiconductor structure includes forming a fin structure protruding from a substrate, and the fin structure includes first semiconductor material layers and second semiconductor material layers alternately stacked. The method also includes forming a dummy gate structure across the fin structure and forming a gate spacer on a sidewall of the dummy gate structure. The method also includes partially oxidizing the gate spacer to form an oxide layer and removing the oxide layer to form a modified gate spacer. The method also includes removing the first semiconductor material layers to form gaps and forming a gate structure in the gaps to wrap around the second semiconductor material layers and over the second semiconductor material layers to cover the modified gate spacer.
    Type: Application
    Filed: June 2, 2022
    Publication date: June 15, 2023
    Inventors: Yu-Jiun Peng, Hsuan-Chih Wu, Cheng-Chung Chang, Shu-Han Chen, Hsiu-Hao Tsao, Min-Chia Lee, Kai-Min Chien, Ming-Chang Wen, Kuo-Feng Yu, Chang-Jhih Syu