Abstract: The present disclosure provides a method and an apparatus for arranging electrical components within a semiconductor device, and a non-transitory computer-readable medium. The method includes (a) providing a first layout including a plurality of cells placed therein; (b) generating a second layout by performing a first set of calculations on the first layout such that cell congestions in the first layout is eliminated from the second layout; (c) generating a third layout by performing a second set of calculations on the second layout such that the total wire length of the third layout is less than that of the second layout; and (d) iterating the operations (b) and (c) until a target layout conforming a convergence criterion.

Abstract: The present disclosure provides a method and an apparatus for arranging electrical components within a semiconductor device, and a non-transitory computer-readable medium. The method includes (a) placing a plurality of cells in a first layout; (b) generating a second layout by performing a first set of calculations on the first layout such that a total wire length of the second layout is less than that of the first layout; (c) generating a third layout by performing a second set of calculations on the second layout such that cell congestions in the second layout is eliminated from the third layout; (d) generating a fourth layout by performing a third set of calculations on the third layout such that the total wire length of the fourth layout is less than that of the third layout; and (e) iterating the operations (c) and (d) until a target layout conforms to a convergence criterion.

Abstract: The present disclosure provides a method and an apparatus for arranging electrical components within a semiconductor device, and a non-transitory computer-readable medium. The method includes (a) placing a plurality of cells in a first layout, wherein the first layout includes a first row and a second row adjacent to the first row; (b) dividing the first layout into a plurality of regions; (c) calculating a first density of each of the plurality of regions; (d) calculating, for a first region of the plurality of regions, a first probability of altering cell versions for cells in the first region according to the first density of the first region; (e) altering cell versions of one or more cells in the first region according to a comparison between the first probability and a first threshold; and (f) rearranging the cells in the first layout to reduce cell overlap.

Abstract: The present disclosure provides a method and an apparatus for arranging electrical components within a semiconductor device, and a non-transitory computer-readable medium. The method includes (a) placing a plurality of cells in a first layout; (b) generating a second layout by performing a first set of calculations on the first layout such that a total wire length of the second layout is less than that of the first layout; (c) generating a third layout by performing a second set of calculations on the second layout such that cell congestions in the second layout is eliminated from the third layout; (d) generating a fourth layout by performing a third set of calculations on the third layout such that the total wire length of the fourth layout is less than that of the third layout; and (e) iterating the operations (c) and (d) until a target layout conforms to a convergence criterion.

Abstract: A light transmission touch panel comprises a transparent substrate, a transparent conductive layer, an insulating layer, a plurality of first metal lines, and a plurality of second metal lines. The transparent conductive layer is overlaid on a surface of the transparent substrate and comprises a plurality of first cells, a plurality of second cells and a plurality of connecting lines, wherein the plurality of first cells and the plurality of second cells are arranged in a staggered manner and the plurality of connecting lines respectively connect the adjacent second cells. The insulating layer further comprises a plurality of insulating areas, each of which is overlaid on one of the first cells. The plurality of second metal lines are respectively disposed on the connecting lines. The plurality of first metal lines are respectively disposed on the plurality of insulating areas, and respectively connect the adjacent first cells.

Abstract: A light transmission touch panel comprises a transparent substrate, a transparent conductive layer, an insulating layer, a plurality of first metal lines, and a plurality of second metal lines. The transparent conductive layer is overlaid on a surface of the transparent substrate and comprises a plurality of first cells, a plurality of second cells and a plurality of connecting lines, wherein the plurality of first cells and the plurality of second cells are arranged in a staggered manner and the plurality of connecting lines respectively connect the adjacent second cells. The insulating layer further comprises a plurality of insulating areas, each of which is overlaid on one of the first cells. The plurality of second metal lines are respectively disposed on the connecting lines. The plurality of first metal lines are respectively disposed on the plurality of insulating areas, and respectively connect the adjacent first cells.

Abstract: A light transmission touch panel comprises a transparent substrate, a transparent conductive layer, an insulating layer, a plurality of first metal lines, and a plurality of second metal lines. The transparent conductive layer is overlaid on a surface of the transparent substrate and comprises a plurality of first cells, a plurality of second cells and a plurality of connecting lines, wherein the plurality of first cells and the plurality of second cells are arranged in a staggered manner and the plurality of connecting lines respectively connect the adjacent second cells. The insulating layer further comprises a plurality of insulating areas, each of which is overlaid on one of the first cells. The plurality of second metal lines are respectively disposed on the connecting lines. The plurality of first metal lines are respectively disposed on the plurality of insulating areas, and respectively connect the adjacent first cells.