Patents by Inventor Hsuan-Hui HUNG

Hsuan-Hui HUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Passivation structure and method of making the same
    Patent number: 10049956
    Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: August 14, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chi Chuang, Hsuan-Hui Hung, Kun-Ming Huang, Ming-Yi Lin
  • PASSIVATION STRUCTURE AND METHOD OF MAKING THE SAME
    Publication number: 20180012817
    Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
    Type: Application
    Filed: September 11, 2017
    Publication date: January 11, 2018
    Inventors: Cheng-Chi CHUANG, Hsuan-Hui HUNG, Kun-Ming HUANG, Ming-Yi LIN
  • Passivation structure and method of making the same
    Patent number: 9761504
    Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: September 12, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chi Chuang, Kun-Ming Huang, Hsuan-Hui Hung, Ming-Yi Lin
  • PASSIVATION STRUCTURE AND METHOD OF MAKING THE SAME
    Publication number: 20160086868
    Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
    Type: Application
    Filed: December 7, 2015
    Publication date: March 24, 2016
    Inventors: Cheng-Chi Chuang, Kun-Ming Huang, Hsuan-Hui Hung, Ming-Yi Lin
  • Passivation structure and method of making the same
    Patent number: 9209102
    Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: December 8, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chi Chuang, Kun-Ming Huang, Hsuan-Hui Hung, Ming-Yi Lin
  • PASSIVATION STRUCTURE AND METHOD OF MAKING THE SAME
    Publication number: 20150054143
    Abstract: A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer.
    Type: Application
    Filed: October 20, 2014
    Publication date: February 26, 2015
    Inventors: Cheng-Chi CHUANG, Kun-Ming HUANG, Hsuan-Hui HUNG, Ming-Yi LIN
  • Passivation scheme
    Patent number: 8884405
    Abstract: An integrated circuit includes a substrate and passivation layers. The passivation layers include a bottom dielectric layer formed over the substrate for passivation, a doped dielectric layer formed over the bottom dielectric layer for passivation, and a top dielectric layer formed over the doped dielectric layer for passivation.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chi Chuang, Kun-Ming Huang, Hsuan-Hui Hung, Ming-Yi Lin
  • PASSIVATION SCHEME
    Publication number: 20140001607
    Abstract: An integrated circuit includes a substrate and passivation layers. The passivation layers include a bottom dielectric layer formed over the substrate for passivation, a doped dielectric layer formed over the bottom dielectric layer for passivation, and a top dielectric layer formed over the doped dielectric layer for passivation.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Chi CHUANG, Kun-Ming HUANG, Hsuan-Hui HUNG, Ming-Yi LIN