Patents by Inventor Hsuan-Jung Wu

Hsuan-Jung Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual circuit digital isolator
    Patent number: 12068237
    Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: August 20, 2024
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Cory Voisine, Kenneth Snowdon, Hsuan-Jung Wu
  • DUAL CIRCUIT DIGITAL ISOLATOR
    Publication number: 20230084169
    Abstract: An apparatus including; a substrate; an isolator that is formed over the substrate, the isolator including a silicon shield layer that is formed between a first buried oxide (BOX) layer and a second BOX layer; a silicon layer having an oxide trench structure formed therein, the oxide trench structure being arranged to define a first silicon island and a second silicon island; a first electronic circuit that is formed over the first silicon island; and a second electronic circuit that is formed over the second silicon island, the first electronic circuit being electrically coupled to the first electronic circuit.
    Type: Application
    Filed: October 31, 2022
    Publication date: March 16, 2023
    Applicant: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Cory Voisine, Kenneth Snowdon, Hsuan-Jung Wu
  • Dual circuit digital isolator
    Patent number: 11515246
    Abstract: An apparatus, comprising: a substrate; a coupling capacitor that is formed over the substrate; and an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: November 29, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Cory Voisine, Kenneth Snowdon, Hsuan-Jung Wu
  • DUAL CIRCUIT DIGITAL ISOLATOR
    Publication number: 20220115316
    Abstract: An apparatus, comprising: a substrate; a coupling capacitor that is formed over the substrate; and an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Sundar Chetlur, Maxim Klebanov, Cory Voisine, Kenneth Snowdon, Hsuan-Jung Wu