Abstract: An efficient control technology for non-volatile memory is shown. A non-volatile memory provides a storage space that is divided into blocks. When programming the write data issued by the host to the non-volatile memory, the programming order of the blocks is recorded. Garbage collection is based on the recorded programming order. Sequential data can be collected to the destination block in sequence.

Abstract: An efficient control technology for non-volatile memory is shown. A controller selects the main source block from the non-volatile memory, wherein the main source block has a logical group amount exceeding a threshold amount. The controller selects a target logical group from the main source block, and collects data of the target logical group to a destination block provided by the non-volatile memory to reduce the logical group amount of the main source block.

Abstract: Uncorrectable (UNC) marking on a non-volatile memory is provided. In response to a UNC marking command issued by a host, a cyclic redundancy check (CRC) engine provides a specific CRC code to mark a logical address segment as uncorrectable, wherein the logical address segment is requested to be marked as uncorrectable by the UNC marking command. As long as the specific CRC code is recognized, a CRC procedure is not required and the data requested by the host is directly determined as uncorrectable.

Abstract: An efficient control technology for non-volatile memory is shown. A controller selects the main source block from the non-volatile memory, wherein the main source block has a logical group amount exceeding a threshold amount. The controller selects a target logical group from the main source block, and collects data of the target logical group to a destination block provided by the non-volatile memory to reduce the logical group amount of the main source block.

Abstract: An efficient control technology for non-volatile memory is shown. A non-volatile memory provides a storage space that is divided into blocks. When programming the write data issued by the host to the non-volatile memory, the programming order of the blocks is recorded. Garbage collection is based on the recorded programming order. Sequential data can be collected to the destination block in sequence.

Abstract: Uncorrectable (UNC) marking on a non-volatile memory is provided. In response to a UNC marking command issued by a host, a cyclic redundancy check (CRC) engine provides a specific CRC code to mark a logical address segment as uncorrectable, wherein the logical address segment is requested to be marked as uncorrectable by the UNC marking command. As long as the specific CRC code is recognized, a CRC procedure is not required and the data requested by the host is directly determined as uncorrectable.

Abstract: A data storage device includes a memory controller and a memory device. The memory controller includes multiple memory blocks, and each memory block includes multiple pages. The memory controller is coupled to the memory device and configured to access the memory device. In an initialization procedure of the data storage device, the memory controller is configured to determine whether a sudden power-off has occurred during a first write operation to write data to a first memory block, and when a sudden power-off is determined to have occurred during the first write operation, the memory controller is configured to select a second memory block that is and write data to the second memory block in a second write operation.

Abstract: A data storage device includes a memory device and a memory controller. The memory controller is coupled to the memory device and configured to access the memory device and establish a physical to logical address mapping table and a logical address section table. The logical address section table records statuses of a plurality of logical address sections. Each status is utilized to indicate whether the physical to logical address mapping table records any logical address that belongs to the corresponding logical address section. The logical address section table includes a plurality of section bits in a plurality of dimensions. When the memory controller receives a write command to write data of a first predetermined logical address, the memory controller determines the section bit of each dimension corresponding to the first predetermined logical address, and accordingly sets a corresponding digital value for each section bit.

Abstract: The present invention provides a method for accessing a flash module, wherein the method includes: creating a logical address group table corresponding to a block of the flash module, wherein the logical address group table records states of a plurality of logical address groups, and the state of each logical address group represents if data written into the block has any logical address within the logical address group; when the block is under a garbage collection operation, referring to the logical address group table to read at least one logical address to physical address (L2P) mapping table; and determining valid pages and invalid pages within the block according to the L2P table, for performing the garbage collection operation.

Abstract: A data storage device includes a memory controller and a memory device. The memory controller includes multiple memory blocks, and each memory block includes multiple pages. The memory controller is coupled to the memory device and configured to access the memory device. In an initialization procedure of the data storage device, the memory controller is configured to determine whether a sudden power-off has occurred during a first write operation to write data to a first memory block, and when a sudden power-off is determined to have occurred during the first write operation, the memory controller is configured to select a second memory block that is and write data to the second memory block in a second write operation.

Abstract: A data storage device includes a memory device and a memory controller. The memory controller is coupled to the memory device and configured to access the memory device and establish a physical to logical address mapping table and a logical address section table. The logical address section table records statuses of a plurality of logical address sections. Each status is utilized to indicate whether the physical to logical address mapping table records any logical address that belongs to the corresponding logical address section. The logical address section table includes a plurality of section bits in a plurality of dimensions. When the memory controller receives a write command to write data of a first predetermined logical address, the memory controller determines the section bit of each dimension corresponding to the first predetermined logical address, and accordingly sets a corresponding digital value for each section bit.

Abstract: The present invention provides a method for accessing a flash module, wherein the method includes: creating a logical address group table corresponding to a block of the flash module, wherein the logical address group table records states of a plurality of logical address groups, and the state of each logical address group represents if data written into the block has any logical address within the logical address group; when the block is under a garbage collection operation, referring to the logical address group table to read at least one logical address to physical address (L2P) mapping table; and determining valid pages and invalid pages within the block according to the L2P table, for performing the garbage collection operation.