Patents by Inventor Hsuan-Ting Kuo

Hsuan-Ting Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250192011
    Abstract: A semiconductor package includes a package substrate, an integrated interconnect structure, an optical engine module, and an integrated circuit package. The integrated interconnect structure is bonded over the package substrate and includes an insulation body, a plurality of through vias extending through the insulation body. The optical engine module includes an electronic die, a photonic die, and a waveguide. A portion of the optical engine module is embedded in the integrated interconnect structure. The integrated circuit package is bonded over the integrated interconnect structure and electrically coupled to the optical engine module.
    Type: Application
    Filed: December 7, 2023
    Publication date: June 12, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Chiu, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Chia-Shen Cheng, Hsuan-Ting Kuo
  • Publication number: 20250147245
    Abstract: A package assembly and a manufacturing method thereof are provided. The package assembly includes a photonic integrated circuit component, an electric integrated circuit component, a lens and an optical signal port. The photonic integrated circuit component comprises an optical input/output portion configured to transmit and receive optical signal. The electric integrated circuit component is electrically connected to the photonic integrated circuit component. The lens is disposed on a sidewall of the photonic integrated circuit component. The optical signal port is optically coupled to the optical input/output portion.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 8, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chih Lin, Hsuan-Ting Kuo, Cheng-Yu Kuo, Yen-Hung Chen, Chia-Shen Cheng, Chao-Wei Li, Ching-Hua Hsieh, Wen-Chih Chiou
  • Publication number: 20250149495
    Abstract: A semiconductor package and the method of forming the same are provided. The semiconductor package may include a substrate, a semiconductor package component having a semiconductor die bonded to the substrate, a lid attached to the substrate, and a first composite metal feature between the semiconductor package component and the lid. The first composite metal feature may include a first metal feature having a first material and a second metal feature having a second material. The first material may be an intermetallic compound. The second material may be different from the first material.
    Type: Application
    Filed: February 15, 2024
    Publication date: May 8, 2025
    Inventors: Chao-Wei Chiu, Hsiu-Jen Lin, Hsuan-Ting Kuo, Ching-Hua Hsieh
  • Publication number: 20250118716
    Abstract: A semiconductor package includes a semiconductor element, at least one electronic die, at least one optical die, an encapsulant, and a substrate. The semiconductor element has a first side and a second side opposing to the first side. The at least one electronic die is disposed over the first side. The at least one optical die is disposed over the first side and next to the at least one electronic die. The encapsulant is disposed on the first side and covers the at least one electronic die, where a sidewall of the at least one optical die is distant from the encapsulant, and a sidewall of the encapsulant is aligned with a sidewall of the semiconductor element. The substrate is disposed over the second side, where the at least one electronic die is electrically coupled to the substrate and the at least one optical die through the semiconductor element.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Cheng-Shiuan Wong, Chia-Shen Cheng, Hsuan-Ting Kuo, Hao-Jan Pei, Hsiu-Jen Lin
  • Publication number: 20250093593
    Abstract: Optical devices and methods of manufacture are presented in which a mirror structure is utilized to transmit and receive optical signals to and from an optical device. In embodiments the mirror structure receives optical signals from outside of an optical device and directs the optical signals through at least one mirror to an optical component of the optical device.
    Type: Application
    Filed: January 3, 2024
    Publication date: March 20, 2025
    Inventors: Wen-Chih Lin, Cheng-Yu Kuo, Yen-Hung Chen, Hsuan-Ting Kuo, Chia-Shen Cheng, Chao-Wei Li, Ching-Hua Hsieh, Wen-Chih Chiou, Ming-Fa Chen, Shang-Yun Hou
  • Publication number: 20250087652
    Abstract: A semiconductor package includes an interposer that has a first side and a second side opposing the first side. A semiconductor device that is on the first side of the interposer and an optical device that is on the first side of the interposer and next to the semiconductor device. A first encapsulant layer includes a first portion and a second portion. The first portion of the first encapsulant layer is on the first side of the interposer and along sidewalls of the semiconductor device. A gap is between a first sidewall of the optical device and a second sidewall of the first portion of the first encapsulant layer. A substrate is over the second side of the interposer. The semiconductor device and the optical device are electrically coupled to the substrate through the interposer.
    Type: Application
    Filed: January 5, 2024
    Publication date: March 13, 2025
    Inventors: Wei-Yu Chen, Cheng-Shiuan Wong, Chia-Shen Cheng, Hsuan-Ting Kuo, Hao-Jan Pei, Hsiu-Jen Lin, Mao-Yen Chang
  • Publication number: 20250069545
    Abstract: The present disclosure provides an electronic device including a display and a light-adjustable control panel including a plurality of light control units. The light-adjustable control panel includes a first substrate, a second substrate, and a display medium sandwiched between the first substrate and the second substrate. In a first displaying mode, the light control units form a plurality of first transparent regions and a plurality of non-transparent regions alternately arranged, and in a second displaying mode, the control units form a second transparent region. A ratio of a total area of the first transparent regions to a total area of the light control units is different from a ratio of an area of the second transparent region to the total area of the light control units.
    Type: Application
    Filed: July 25, 2024
    Publication date: February 27, 2025
    Applicant: InnoLux Corporation
    Inventors: Hong-Sheng HSIEH, Chia-Hsien HSIEH, Chih-Yung HSIEH, Hsuan-Ting KUO
  • Publication number: 20250070077
    Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.
    Type: Application
    Filed: November 7, 2024
    Publication date: February 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
  • Publication number: 20250062181
    Abstract: A method includes depositing a first metal layer on a package component, wherein the package component comprises a first device die, forming a dielectric layer on the package component, and plating a metal thermal interface material on the first metal layer. The dielectric layer includes portions on opposing sides of the metal thermal interface material. A heat sink is bonded on the metal thermal interface material. The heat sink includes a second metal layer physically joined to the metal thermal interface material.
    Type: Application
    Filed: November 13, 2023
    Publication date: February 20, 2025
    Inventors: Chao-Wei Chiu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Patent number: 12176319
    Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: December 24, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
  • Publication number: 20240389240
    Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Inventors: Chao-Wei Chiu, Chih-Chiang Tsao, Jen-Jui Yu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240371813
    Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Jui Yu, Chih-Chiang Tsao, Hsuan-Ting Kuo, Mao-Yen Chang, Hsiu-Jen Lin, Ching-Hua Hsieh, Hao-Jan Pei
  • Publication number: 20240363388
    Abstract: An adhesion film with a plurality of semiconductor packages thereupon may be positioned on a pedestal including an enclosure and having a perforated top surface, a first support ring located at a periphery of the perforated top surface, and a second support ring laterally surrounding the first support ring. A first semiconductor package overlaps segments of the first support ring at a plurality of overlap areas in a top-down view, and does not contact the second support ring in the top-down view. A vacuum suction may be applied to a volume within the enclosure and to a gap which is vertically bounded by a bottom surface of the adhesion film and is laterally bounded by the first support ring while holding the first semiconductor package stationary. A portion of the adhesion film underlying the first semiconductor package is peeled off a bottom surface of the first semiconductor package.
    Type: Application
    Filed: April 26, 2023
    Publication date: October 31, 2024
    Inventors: Hsin Liang Chen, Ching-Hua Hsieh, Hsiu-Jen Lin, Hsuan-Ting Kuo, Wei-Yu Chen, Cheng-Shiuan Wong
  • Patent number: 12107064
    Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: October 1, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Jui Yu, Chih-Chiang Tsao, Hsuan-Ting Kuo, Mao-Yen Chang, Hsiu-Jen Lin, Ching-Hua Hsieh, Hao-Jan Pei
  • Publication number: 20240274589
    Abstract: A manufacturing method of a package-on-package structure includes placing a lower package on a tape, where conductive bumps of the lower package are in contact with the tape; and bonding an upper package to the lower package, where during the bonding, the conductive bumps are pressed against the tape so that a curvature of the respective conductive bump changes.
    Type: Application
    Filed: April 22, 2024
    Publication date: August 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-shuan Chung
  • Patent number: 12009345
    Abstract: An embodiment is method including forming a first die package over a carrier substrate, the first die package comprising a first die, forming a first redistribution layer over and coupled to the first die, the first redistribution layer including one or more metal layers disposed in one or more dielectric layers, adhering a second die over the redistribution layer, laminating a first dielectric material over the second die and the first redistribution layer, forming first vias through the first dielectric material to the second die and forming second vias through the first dielectric material to the first redistribution layer, and forming a second redistribution layer over the first dielectric material and over and coupled to the first vias and the second vias.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tse Chen, Chung-Shi Liu, Chih-Wei Lin, Hui-Min Huang, Hsuan-Ting Kuo, Ming-Da Cheng
  • Publication number: 20240186275
    Abstract: Semiconductor devices including the use of solder materials and methods of manufacturing are provided. In embodiments the solder materials utilize a first tensile raising material, a second tensile raising material, and a eutectic modifier material. By utilizing the materials a solder material can be formed and used with a reduced presence of needles that may otherwise form during the placement and use of the solder material.
    Type: Application
    Filed: January 9, 2023
    Publication date: June 6, 2024
    Inventors: Chao-Wei Chiu, Jen-Jui Yu, Hsuan-Ting Kuo, Cheng-Shiuan Wong, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Patent number: 11996400
    Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsuan-Ting Kuo, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hao-Jan Pei, Yu-Peng Tsai, Chia-Lun Chang, Chih-Chiang Tsao, Philip Yu-Shuan Chung
  • Publication number: 20240107682
    Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.
    Type: Application
    Filed: April 21, 2023
    Publication date: March 28, 2024
    Inventors: Chao-Wei Chiu, Chih-Chiang Tsao, Jen-Jui Yu, Hsuan-Ting Kuo, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240071952
    Abstract: A method includes depositing solder paste over first contact pads of a first package component. Spring connectors of a second package component are aligned to the solder paste. The solder paste is reflowed to electrically and physically couple the spring connectors of the second package component to the first contact pads of the first package component. A device includes a first package component and a second package component electrically and physically coupled to the first package component by way of a plurality of spring coils. Each of the plurality of spring coils extends from the first package component to the second package component.
    Type: Application
    Filed: January 10, 2023
    Publication date: February 29, 2024
    Inventors: Chih-Chiang Tsao, Hsuan-Ting Kuo, Chao-Wei Chiu, Hsiu-Jen Lin, Ching-Hua Hsieh