Abstract: A signal adjusting circuit and a receiving end circuit using the same are provided. The signal adjusting circuit is adapted to a peak detector, and includes a first amplifier and a first feedback circuit. The first amplifier receives a first input signal, and amplifies the first input signal to output a first output signal. The first feedback circuit is connected between a first input terminal and a first output terminal of the first amplifier, and is configured to determine a first gain of the first output signal. The peak detector is connected to a first output node of the first feedback circuit, so as to receive a first detection signal and detect a peak value of the first detection signal. The peak detector has a predetermined power input range, and the first feedback circuit keeps the first detection signal within the predetermined power input range.

Abstract: A signal adjusting circuit and a receiving end circuit using the same are provided. The signal adjusting circuit is adapted to a peak detector, and includes a first amplifier and a first feedback circuit. The first amplifier receives a first input signal, and amplifies the first input signal to output a first output signal. The first feedback circuit is connected between a first input terminal and a first output terminal of the first amplifier, and is configured to determine a first gain of the first output signal. The peak detector is connected to a first output node of the first feedback circuit, so as to receive a first detection signal and detect a peak value of the first detection signal. The peak detector has a predetermined power input range, and the first feedback circuit keeps the first detection signal within the predetermined power input range.

Abstract: A filter includes multiple filter circuits. The filter circuits are coupled in series between an input terminal and an output terminal, to generate an output signal according to an input signal. One of the filter circuits operates as an active filter circuit or a passive filter circuit according to amplitude of the input signal.

Abstract: A filter includes M filter circuits. The M filter circuits are sequentially cascaded from an input terminal to an output terminal, in order to generate an output signal according to an input signal, in which M is a positive integer greater than or equal to 2. The M filter circuits include at least one first filter circuit and at least one second filter circuit. Each of the at least one first filter circuit is set to be an active filter circuit, and each of the at least one second filter circuit is set to be a passive filter circuit.

Abstract: A filter includes multiple filter circuits. The filter circuits are coupled in series between an input terminal and an output terminal, to generate an output signal according to an input signal. One of the filter circuits operates as an active filter circuit or a passive filter circuit according to amplitude of the input signal.

Abstract: A filter includes M filter circuits. The M filter circuits are sequentially cascaded from an input terminal to an output terminal, in order to generate an output signal according to an input signal, in which M is a positive integer greater than or equal to 2. The M filter circuits include at least one first filter circuit and at least one second filter circuit. Each of the at least one first filter circuit is set to be an active filter circuit, and each of the at least one second filter circuit is set to be a passive filter circuit.

Abstract: A front-end circuit for a wireless communication system includes a first amplifier, a second amplifier and an antenna switch. The first amplifier is disposed at a receiving path, wherein the first amplifier has an input terminal and an output terminal, and the input terminal of the first amplifier is coupled to a first pad. The second amplifier is disposed at a transmission path, wherein the second amplifier has an input terminal and an output terminal, and the output terminal of the second amplifier is coupled to a second pad different from the first pad. The antenna switch is coupled between the input terminal of the first amplifier and the output terminal of the second amplifier.

Abstract: The present disclosure discloses an active mixer capable of improving linearity while giving consideration to both gain and noise reduction, including: a voltage-to-current converting circuit operable to generate a conversion signal according to an input signal; a switching circuit operable to carry out a switching action according to a clock signal and thereby electrically connect the voltage-to-current converting circuit with a load circuit; the load circuit operable to provide an output signal for a first and a second output nodes according to the conversion signal through the switching action; a first supplement current source, coupled to a first node between the switching circuit and the first output node, operable to supply a first supplemental current to the switching circuit; and a second supplement current source, coupled to a second node between the switching circuit and the second output node, operable to supply a second supplemental current to the switching circuit.

Abstract: A front-end circuit for a wireless communication system includes a first amplifier, a second amplifier and an antenna switch. The first amplifier is disposed at a receiving path, wherein the first amplifier has an input terminal and an output terminal, and the input terminal of the first amplifier is coupled to a first pad. The second amplifier is disposed at a transmission path, wherein the second amplifier has an input terminal and an output terminal, and the output terminal of the second amplifier is coupled to a second pad different from the first pad. The antenna switch is coupled between the input terminal of the first amplifier and the output terminal of the second amplifier.

Abstract: A negative resistance generator is disclosed herein. The negative resistance generator includes a first signal end for receiving a first signal which includes first AC/DC components, a second signal end for receiving a second signal which includes second AC/DC components, first and second transistors, a power source circuit, a first and a second DC level setting circuits. The power source circuit is coupled to the first and second transistors. The first DC level setting circuit provides a second gate voltage for a second gate of the second transistor according to a first DC voltage and the first AC component. The second DC level setting circuit provides a first gate voltage for a first gate of the first transistor according to a second DC voltage and the second AC component. The second gate voltage and first gate voltage are lower than the voltages of the first and the second signal respectively.

Abstract: A negative resistance generator is disclosed herein. The negative resistance generator includes a first signal end for receiving a first signal which includes first AC/DC components, a second signal end for receiving a second signal which includes second AC/DC components, first and second transistors, a power source circuit, a first and a second DC level setting circuits. The power source circuit is coupled to the first and second transistors. The first DC level setting circuit provides a second gate voltage for a second gate of the second transistor according to a first DC voltage and the first AC component. The second DC level setting circuit provides a first gate voltage for a first gate of the first transistor according to a second DC voltage and the second AC component. The second gate voltage and first gate voltage are lower than the voltages of the first and the second signal respectively.

Abstract: The present disclosure discloses an active mixer capable of improving linearity while giving consideration to both gain and noise reduction, including: a voltage-to-current converting circuit operable to generate a conversion signal according to an input signal; a switching circuit operable to carry out a switching action according to a clock signal and thereby electrically connect the voltage-to-current converting circuit with a load circuit; the load circuit operable to provide an output signal for a first and a second output nodes according to the conversion signal through the switching action; a first supplement current source, coupled to a first node between the switching circuit and the first output node, operable to supply a first supplemental current to the switching circuit; and a second supplement current source, coupled to a second node between the switching circuit and the second output node, operable to supply a second supplemental current to the switching circuit.

Abstract: The present invention provides one dual-modulus prescaler using double edge triggered D-flip-flops. The dual-modulus prescaler comprises one double edge triggered synchronous block, one asynchronous block, and one combination logic block. The double edge triggered synchronous block is used to receive an input signal and a divisor selection signal from the combination logic block, and output a synchronous block output signal to the asynchronous block. The asynchronous block is used to receive the synchronous block output signal and output a plurality of signals to the combination logic block. One of the output signals of the asynchronous block is the output signal of the dual-modulus prescaler. The combination logic block is used to receive all the output signals of the asynchronous block and a modulus selection signal. Then, the combination logic block outputs the divisor selection signal and feeds it back to the double edge triggered synchronous block.