Patents by Inventor Hsueh-Chih Tseng

Hsueh-Chih Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Manufacturing method of semiconductor device
    Patent number: 10607891
    Abstract: A manufacturing method of a semiconductor device includes following steps. First gate structures and second gate structures are formed on a first region and a second region of a semiconductor substrate respectively. A spacing distance between the second gate structures is larger than that between the first gate structures. A first ion implantation is preformed to form a first doped region between the first gate structures. A second ion implantation is performed to form a second doped region between the second gate structures. A tilt angle of the second ion implantation is larger than that of the first ion implantation. An implantation dose of the second ion implantation is lower than that of the first ion implantation. An etching process is performed to at least partially remove the first doped region to form a first recess and at least partially remove the second doped region to form a second recess.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: March 31, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jiun-Lin Yeh, Hsueh-Chih Tseng, Chia-Chen Tsai, Ta-Kang Lo
  • MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
    Publication number: 20190115259
    Abstract: A manufacturing method of a semiconductor device includes following steps. First gate structures and second gate structures are formed on a first region and a second region of a semiconductor substrate respectively. A spacing distance between the second gate structures is larger than that between the first gate structures. A first ion implantation is preformed to form a first doped region between the first gate structures. A second ion implantation is performed to form a second doped region between the second gate structures. A tilt angle of the second ion implantation is larger than that of the first ion implantation. An implantation dose of the second ion implantation is lower than that of the first ion implantation. An etching process is performed to at least partially remove the first doped region to form a first recess and at least partially remove the second doped region to form a second recess.
    Type: Application
    Filed: November 6, 2017
    Publication date: April 18, 2019
    Inventors: Jiun-Lin Yeh, Hsueh-Chih Tseng, Chia-Chen Tsai, Ta-Kang Lo