Abstract: A method includes loading a mask having a defect into a chamber. The defect of the mask is repaired by forming a repair feature in a repair region of the mask. The forming the repair feature includes irradiating the repair region of the mask with a radiation beam. The forming the repair feature further includes while irradiating the repair region, injecting a precursor gas into the chamber to form a first film of the repair feature on the repair region, and while irradiating the repair region, injecting a cleaning gas into the chamber. The cleaning gas reacts with an impurity material in the first film to transform the first film into a first cleaned film.

Abstract: A method includes loading a mask having a defect into a chamber. The defect of the mask is repaired by forming a repair feature in a repair region of the mask. The forming the repair feature includes irradiating the repair region of the mask with a radiation beam. The forming the repair feature further includes while irradiating the repair region, injecting a precursor gas into the chamber to form a first film of the repair feature on the repair region, and while irradiating the repair region, injecting a cleaning gas into the chamber. The cleaning gas reacts with an impurity material in the first film to transform the first film into a first cleaned film.

Abstract: A semiconductor device fabrication method includes irradiating a first surface of a substrate with a radiation beam. While irradiating the first surface of the substrate, a precursor gas is introduced near the first surface to deposit a layer including a first material. The precursor gas is removed from near the first surface after the depositing the layer. After the removing the precursor gas and prior to forming another layer over the layer, while irradiating a second surface of the layer, a cleaning gas is introduced near the second surface of the layer to transform the first material into a second material.

Abstract: A EUV mask comprises a low thermal expansion material (LTEM) substrate, a reflective multi-layer (ML) over the LTEM substrate, and a patterned absorber layer over the reflective ML. The reflective ML includes a defect. The EUV mask further comprises a mark associated with the defect. The mark is one of: a deposit over the patterned absorber layer at a distance offset from the defect, and a cavity into the patterned absorber layer in an area over the defect.

Abstract: The present disclosure relates to a method and apparatus for mitigating printable native defects in an extreme ultra violet (EUV) mask substrate. In some embodiments, the method is performed by identifying a printable native defect within an EUV mask substrate that violates one or more sizing thresholds. A first section of the EUV mask substrate including the printable native defect is removed to form a concavity within the EUV mask substrate. A multi-layer replacement section that is devoid of a printable native defect is inserted into the concavity.

Abstract: A semiconductor device fabrication method includes irradiating a first surface of a substrate with a radiation beam. While irradiating the first surface of the substrate, a precursor gas is introduced near the first surface to deposit a layer including a first material. The precursor gas is removed from near the first surface after the depositing the layer. After the removing the precursor gas and prior to forming another layer over the layer, while irradiating a second surface of the layer, a cleaning gas is introduced near the second surface of the layer to transform the first material into a second material.

Abstract: The present disclosure relates to a method and apparatus for mitigating printable native defects in an extreme ultra violet (EUV) mask substrate. In some embodiments, the method is performed by identifying a printable native defect within an EUV mask substrate that violates one or more sizing thresholds. A first section of the EUV mask substrate including the printable native defect is removed to form a concavity within the EUV mask substrate. A multi-layer replacement section that is devoid of a printable native defect is inserted into the concavity.

Abstract: The present disclosure relates to a method and apparatus for mitigating printable native defects in an extreme ultra violet (EUV) mask substrate. In some embodiments, the method is performed by providing an EUV mask substrate having a multi-layer coating disposed over a low thermal expansion material. The sizes of one or more native defects within the EUV mask substrate are measured and printable native defects having a measured size that violates one or more sizing thresholds are identified. A position at which a patterned absorber material is to be formed over the multi-layer coating is determined. The position minimizes a number printable native defects that interact with EUV radiation during an EUV lithography process. By mitigating a number of printable native defects violating the one or more sizing thresholds, the process window of an EUV reticle formed from the EUV mask substrate is improved.

Abstract: A EUV mask comprises a low thermal expansion material (LTEM) substrate, a reflective multi-layer (ML) over the LTEM substrate, and a patterned absorber layer over the reflective ML. The reflective ML includes a defect. The EUV mask further comprises a mark associated with the defect. The mark is one of: a deposit over the patterned absorber layer at a distance offset from the defect, and a cavity into the patterned absorber layer in an area over the defect.

Abstract: A method for repairing a mask is disclosed. A mask, having at least one defect need to be repaired, is received. The mask includes a transmissive mask or a reflective mask. A location and size of the defect is determined. A repair hard mask (RHM) is formed over the mask. Various configuration of the RHM are disclosed. A repairing process is performed, with the RHM over the mask, to repair the defect.

Abstract: A method for lithography patterning is disclosed. An exemplary method includes receiving an IC design layout, the IC design layout having an IC pattern and receiving a mask, the mask having a defect. The method further includes making at least one mark on the mask in relation to the defect; positioning the IC design layout over the mask thereby covering the defect by the IC pattern; and patterning the mask with the IC design layout.

Abstract: The present disclosure relates to a method and apparatus for mitigating printable native defects in an extreme ultra violet (EUV) mask substrate. In some embodiments, the method is performed by providing an EUV mask substrate having a multi-layer coating disposed over a low thermal expansion material. The sizes of one or more native defects within the EUV mask substrate are measured and printable native defects having a measured size that violates one or more sizing thresholds are identified. A position at which a patterned absorber material is to be formed over the multi-layer coating is determined. The position minimizes a number printable native defects that interact with EUV radiation during an EUV lithography process. By mitigating a number of printable native defects violating the one or more sizing thresholds, the process window of an EUV reticle formed from the EUV mask substrate is improved.

Abstract: A method for repairing a mask is disclosed. A mask, having at least one defect need to be repaired, is received. The mask includes a transmissive mask or a reflective mask. A location and size of the defect is determined. A repair hard mask (RHM) is formed over the mask. Various configuration of the RHM are disclosed. A repairing process is performed, with the RHM over the mask, to repair the defect.

Abstract: A method for lithography patterning is disclosed. An exemplary method includes receiving an IC design layout, the IC design layout having an IC pattern and receiving a mask, the mask having a defect. The method further includes making at least one mark on the mask in relation to the defect; positioning the IC design layout over the mask thereby covering the defect by the IC pattern; and patterning the mask with the IC design layout.