Abstract: Disclosed are a timing estimation method and a simulator. The method is applied to a function verification model. In the method, the model issues a first access issue at a first time point; receives a first response to the first access issue from the bus at a second time point; calculates a delay time between the first and second time points; determines whether the delay time is longer than or substantially equal to a transmission time corresponding to the first access issue; issues a second access issue if yes; and issues the second access issue in a compensation time counting from the second time point if not. The compensation time is not longer than the difference between the transmission time and the delay time.

Abstract: A power consumption estimation method is applied to an image with N rows of pixels, and comprises a pixel estimation procedure comprising performing an estimation sub-procedure pixel by pixel for each of a plurality of pixels in one row of the N rows of pixels to obtain a plurality of pixel energy consumption values respectively corresponding to the plurality of pixels in said one row of the N rows, and obtaining a row power consumption value corresponding to said one row of the N rows according to the plurality of pixel energy consumption values. The estimation sub-procedure comprises obtaining pixel content information corresponding to one of the plurality of pixels, and determining the pixel energy consumption value according to the pixel content information. The pixel energy consumption value indicates pixel energy consumption generated by performing a predetermined image processing procedure for said one of the plurality of pixels.

Abstract: A scheduling method is provided. The method includes: recording a next instruction and a ready state of each thread group in a scoreboard; determining whether there is any ready thread group whose ready state is affirmative; determining whether a load/store unit is available, wherein the load/store unit is configured to access a data memory unit; when the load/store unit is available, determining whether the ready thread groups include a data access thread group, wherein the next instruction of the data access thread group is related to accessing the data memory unit; selecting a target thread group from the data access thread groups; and dispatching the target thread group to the load/store unit for execution.

Abstract: A power consumption estimation method is applied to an image with N rows of pixels, and comprises a pixel estimation procedure comprising performing an estimation sub-procedure pixel by pixel for each of a plurality of pixels in one row of the N rows of pixels to obtain a plurality of pixel energy consumption values respectively corresponding to the plurality of pixels in said one row of the N rows, and obtaining a row power consumption value corresponding to said one row of the N rows according to the plurality of pixel energy consumption values. The estimation sub-procedure comprises obtaining pixel content information corresponding to one of the plurality of pixels, and determining the pixel energy consumption value according to the pixel content information. The pixel energy consumption value indicates pixel energy consumption generated by performing a predetermined image processing procedure for said one of the plurality of pixels.

Abstract: Disclosed are a timing estimation method and a simulator. The method is applied to a function verification model. In the method, the model issues a first access issue at a first time point; receives a first response to the first access issue from the bus at a second time point; calculates a delay time between the first and second time points; determines whether the delay time is longer than or substantially equal to a transmission time corresponding to the first access issue; issues a second access issue if yes; and issues the second access issue in a compensation time counting from the second time point if not. The compensation time is not longer than the difference between the transmission time and the delay time.

Abstract: An analyzing method and an analyzing system for graphics process are provided. The analyzing method includes the following steps. A graphics application program is provided and a plurality of graphics parameters of the graphics application program are obtained. The graphics application program is classified to be at least one of a plurality of groups according to the graphics parameters. A plurality weighting coefficients are obtained. A total loading of a graphics processing unit for performing the graphics application program is calculated according to the weighting coefficients and the graphics parameters.

Abstract: An analyzing method and an analyzing system for graphics process are provided. The analyzing method includes the following steps. A graphics application program is provided and a plurality of graphics parameters of the graphics application program are obtained. The graphics application program is classified to be at least one of a plurality of groups according to the graphics parameters. A plurality weighting coefficients are obtained. A total loading of a graphics processing unit for performing the graphics application program is calculated according to the weighting coefficients and the graphics parameters.

Abstract: A scheduling method is provided. The method includes: recording a next instruction and a ready state of each thread group in a scoreboard; determining whether there is any ready thread group whose ready state is affirmative; determining whether a load/store unit is available, wherein the load/store unit is configured to access a data memory unit; when the load/store unit is available, determining whether the ready thread groups include a data access thread group, wherein the next instruction of the data access thread group is related to accessing the data memory unit; selecting a target thread group from the data access thread groups; and dispatching the target thread group to the load/store unit for execution.

Abstract: A memory modeling method is provided. According to the memory modeling method, a memory model is provided. The memory model includes an array unit, and the array unit includes an array declaration module and a calculation module. A virtual array is defined in a storage device by the array declaration module. The virtual array is configured to simulate a real memory. Further, according to the memory modeling method, an access instruction is received, and an access operation corresponding to the access instruction is performed to the virtual array, wherein the access operation is performed with a transaction level modeling method. Then, an access time or a delay time of the access operation according to the access instruction is estimated by the calculation module.