Patents by Inventor Hsung J. Im

Hsung J. Im has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8717723
    Abstract: A driver circuit of an integrated circuit is described. The driver circuit comprises a signal node coupled to receive an output signal of the integrated circuit; an inductor circuit having a resistor coupled in series with an inductor between a first terminal and a second terminal, wherein the first terminal is coupled to the signal node; an electrostatic discharge protection circuit coupled to the second terminal of the inductor circuit; and an output node coupled to the second terminal of the inductor circuit. A method of generating an output signal is also disclosed.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: May 6, 2014
    Assignee: XILINX, Inc.
    Inventors: Vassili Kireev, Hsung J. Im
  • Publication number: 20130176647
    Abstract: A driver circuit of an integrated circuit is described. The driver circuit comprises a signal node coupled to receive an output signal of the integrated circuit; an inductor circuit having a resistor coupled in series with an inductor between a first terminal and a second terminal, wherein the first terminal is coupled to the signal node; an electro-static discharge protection circuit coupled to the second terminal of the inductor circuit; and an output node coupled to the second terminal of the inductor circuit. A method of generating an output signal is also disclosed.
    Type: Application
    Filed: January 10, 2012
    Publication date: July 11, 2013
    Applicant: XILINX, INC.
    Inventors: Vassili Kireev, Hsung J. Im
  • Patent number: 7839693
    Abstract: An electrically erasable programmable read-only memory (“CMOS NON-VOLATILE MEMORY”) cell is fabricated using standard CMOS fabrication processes. First and second polysilicon gates are patterned over an active area of the cell between source and drain regions. Thermal oxide is grown on the polysilicon gates to provide an isolating layer. Silicon nitride is deposited between the first and second polysilicon gates to form a lateral programming layer.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: November 23, 2010
    Assignee: Xilinix, Inc.
    Inventors: Sunhom Paak, Boon Y. Ang, Hsung J. Im, Daniel Gitlin