Patents by Inventor Hu Ah Lek

Hu Ah Lek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6963124
    Abstract: A panel assembly of packaged integrated circuit devices including a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: November 8, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding
  • Patent number: 6933174
    Abstract: A leadless leadframe semiconductor package having a plurality of contacts, which have contact surfaces on the bottom surface of the package. At least some of the contacts have integrally formed stems that extend outward to the peripheral surface of the package. These stems have heights and widths less than the heights and widths of their corresponding contacts. A molded cap encapsulates at least a portion of the die, the stems and the contacts. Another aspect of the invention pertains to a leadless leadframe panel assembly having a conductive substrate panel that has at least one array of device areas, each array of device areas having a plurality of tie bars and a plurality of contacts. The contacts also have integrally formed stems that extend towards and connect to one of the tie bars. The stems have widths and heights that are less than the widths and heights of their corresponding contacts.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 23, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding
  • Patent number: 6818970
    Abstract: A leadless leadframe semiconductor package includes a plurality of contacts, at least some of which have integrally formed stems that extend to the peripheral surface of the package. These stems have heights and widths less than the heights and widths of their corresponding contacts. A molded cap encapsulates the stems and the contacts to leave contact surfaces of the contacts exposed on the bottom surface of the package. Another aspect of the invention pertains to a leadless leadframe panel assembly having a conductive substrate panel that has at least one array of device areas, which has a plurality of tie bars and a plurality of contacts. The contacts have integrally formed stems that extend towards and connect to one of the tie bars. The stems have widths and heights that are less than the widths and heights of their corresponding contacts.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: November 16, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding
  • Patent number: 6808961
    Abstract: A panel assembly of packaged integrated circuit devices comprising a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The locking passageways extend from a topside of the panel toward a bottom side of the panel. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: October 26, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding
  • Patent number: 6677667
    Abstract: A leadless leadframe semiconductor package comprising a plurality of contacts, which have contact surfaces on the bottom surface of the package. At least some of the contacts have integrally formed stems that extend outward to the peripheral surface of the package. These stems have heights and widths less than the heights and widths of their corresponding contacts. A molded cap encapsulates at least a portion of the die, the stems and the contacts. The molded cap leaves the contact surfaces of the contacts exposed on the bottom surface of the package, leaves a peripheral surface of the stems exposed on the peripheral surface of the package, and covers a bottom surface of each of the stems. Another aspect of the invention pertains to a leadless leadframe panel assembly having a conductive substrate panel that has at least one array of device areas, each array of device areas having a plurality of tie bars and a plurality of contacts.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: January 13, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding
  • Patent number: 6576989
    Abstract: A panel assembly of packaged integrated circuit devices including conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The locking passageways extend from a topside of the panel toward a bottom side of the panel. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: June 10, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding
  • Patent number: 6448107
    Abstract: Leadframe based packages, such as leadless leadframe packages are described that include an orientation indicator that is integrally formed with the leadframe. In one aspect, the leadframe includes a die attach pad, a plurality of contact fingers, a tie bar extending from the die attach pad, and an indicator stem extending from the tie bar. An integrated circuit die is mounted on the die attach pad and electrically coupled bond to associated contact fingers. A protective cap encapsulates the connectors and covers at least a portion of the die and contact fingers while leaving at least a portion of a bottom surface area of the contact fingers exposed to form external electrical contacts for the package. The protective cap leaves an identifying end of the indicator stem exposed through the surface of the protective cap to facilitate identification of a particular contact or region of the package. The described leadless leadframes may be produced in panel form which facilitates panel based packaging.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: September 10, 2002
    Assignee: National Semiconductor Corporation
    Inventors: Harry Kam Cheng Hong, Hu Ah Lek, Santhiran Nadarajah, Sharon Ko Mei Wan, Chan Peng Yeen, Jaime Bayan, Peter Howard Spalding