Patents by Inventor Hu Saigui

Hu Saigui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7809086
    Abstract: An apparatus for demodulating an analogue input signal comprises a hard limiter stage (4) for converting the signal to a two level signal. A digital down converter/low pass filter stage (6) converts the signal to a base band signal, and a symbol synchronization stage (8) extracts symbol timing. An instantaneous phase detector (10) calculates the instantaneous phase of the one or more symbols associated with the input signal. If the input signal has been modulated according to a pi/4DQPSK, pi/2DBPSK, GMSK, or a GFSK modulation scheme, a differential detector (12) determines a difference in the phase between adjacent symbols, a coarse frequency offset compensation stage (14) applies a compensation signal to compensate for frequency offset, and a frequency offset estimation stage (16) updates this compensation signal. A demapper (18) generates a demodulated output signal after compensation by the frequency offset compensation stage.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: October 5, 2010
    Assignee: Oki Techno Centre (Singapore) Pte Ltd
    Inventors: Wang Tingwu, Pan Ju Yan, Yu Yang, Hu Saigui, Tomisawa Masayuki
  • Patent number: 7541966
    Abstract: An apparatus for demodulating a modulated signal comprises an analog to digital converter (2, 12) for converting an analog modulated input signal to a digital signal. The analog to digital converter is arranged to sample the input signal at a predetermined sampling rate. A digital down converter (4, 14) then receives the digital signal at the sampling rate. The digital down converter has an associated digital intermediate frequency and reduces the frequency of the digital signal to one quarter of the sampling rate. A low pass filter (6, 16) filters selected frequencies from the digital signal. A frequency offset stage (8, 18) applies a modification to the frequency of the filtered signal to reduce frequency offset therein, and a differential demodulator (10, 20) demodulates the signal after modifying the frequency to reduce the frequency offset. There is also disclosed a method for demodulating a signal.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: June 2, 2009
    Assignee: Oki Techno Centre (Singapore) Pte Ltd
    Inventors: Xu Changqing, Li Zhiping, Hu Saigui, Tan Kai Ren, Wang Tingwu, Tomisawa Masayuki
  • Publication number: 20080062029
    Abstract: An apparatus for demodulating a modulated signal comprises an analog to digital converter (2, 12) for converting an analog modulated input signal to a digital signal. The analog to digital converter is arranged to sample the input signal at a predetermined sampling rate. A digital down converter (4, 14) then receives the digital signal at the sampling rate. The digital down converter has an associated digital intermediate frequency and reduces the frequency of the digital signal to one quarter of the sampling rate. A low pass filter (6, 16) filters selected frequencies from the digital signal. A frequency offset stage (8, 18) applies a modification to the frequency of the filtered signal to reduce frequency offset therein, and a differential demodulator (10, 20) demodulates the signal after modifying the frequency to reduce the frequency offset. There is also disclosed a method for demodulating a signal.
    Type: Application
    Filed: August 8, 2007
    Publication date: March 13, 2008
    Inventors: Xu Changqing, Li Zhiping, Hu Saigui, Tan Kai Ren, Wang Tingwu, Tomisawa Masayuki
  • Publication number: 20080061870
    Abstract: An apparatus for demodulating an analogue input signal comprises a hard limiter stage (4) for converting the signal to a two level signal, A digital down converter/low pass filter stage (6) converts the signal to a base band signal, and a symbol synchronization stage (8) extracts symbol timing. An instantaneous phase detector (10) calculates the instantaneous phase of the one or more symbols associated with the input signal. If the input signal has been modulated according to a pi/4DQPSK, pi/2DBPSK, GMSK, or a GFSK modulation scheme, a differential detector (12) determines a difference in the phase between adjacent symbols, a coarse frequency offset compensation stage (14) applies a compensation signal to compensate for frequency offset, and a frequency offset estimation stage (16) updates this compensation signal. A demapper (18) generates a demodulated output signal after compensation by the frequency offset compensation stage.
    Type: Application
    Filed: August 8, 2007
    Publication date: March 13, 2008
    Inventors: Wang Tingwu, Pan Ju Yan, Yu Yang, Hu Saigui, Tomisawa Masayuki