Abstract: A motion detection method for detecting motion objects in video frames generated from a video surveillance system. The motion detection method includes the steps of (1) calculating and accumulating a number of a current macro block row by row, the current macro block having a motion vector, which has a predetermined characteristic and a predetermined relation with a motion vector corresponding to a macro block preceding the current macro block, and a current macro block row where the current macro block stays having a position relation with a macro block row preceding the current macro block of the video frame which the motion objects occupy, and (2) determining the motion objects occupy the video frame when the number is larger than a predetermined value.

Abstract: A microprocessor system to correct built-in ROM code includes a program counter and an address space divided into a program ROM (read only memory) space, a small address RAM that is a subset of the program ROM, a working RAM (random access memory), and a small program RAM. When the program counter accesses instructions in the program ROM, the lower bits of the program counter are simultaneously accessing an entry in the address RAM. When a valid bit of the accessed entry indicates and the page number of the accessed entry is the same as the page number in the program counter, the jump address in the accessed entry is placed into the program counter so that corrected code in the program RAM will be executed instead of the indicated faulty code in the program ROM.

Abstract: A method for accessing frame data and data accessing device thereof are provided to access X-bit frame data. The method comprises providing Y memory banks BANKi (1<Y?X), where BANKi represents the ith memory bank (0?i<Y); arranging a partial frame data WL,A (X/Y bits) to be held in BANKj, where WL,A represents a Lth line Ath frame data word and j=(L+A) mod Y; receiving and according to Y word addresses WAk to determine the memory banks where WL,A is located, where addresses WAk represent the addresses of the kth partial frame data ((0?k<Y); and obtaining the partial frame data (X/Y bits) from each BANKi according to the determined results and combining them to form the frame data (X bits).

Abstract: A cache controller unit (CCU) architecture with dirty line write-back auto-adjustment, suitable for high performance microprocessor systems with write-back cache memory. The CCU architecture includes a cache data control unit to access data between a cache memory and a CPU, a tag compare unit to compare an address sent by the CPU and a tag address sent by a tag memory and thus produce a cache hit signal, and a CCU state machine to control the data access direction of the cache data control and produce corresponding operations according to the tag compare result.

Abstract: A cache controller unit (CCU) architecture with dirty line write-back auto-adjustment, suitable for high performance microprocessor systems with write-back cache memory. The CCU architecture includes a cache data control unit to access data between a cache memory and a CPU, a tag compare unit to compare an address sent by the CPU and a tag address sent by a tag memory and thus produce a cache hit signal, and a CCU state machine to control the data access direction of the cache data control and produce corresponding operations according to the tag compare result.

Abstract: A microprocessor system to correct built-in ROM code includes a program counter and an address space divided into a program ROM (read only memory) space, a small address RAM that is a subset of the program ROM, a working RAM (random access memory), and a small program RAM. When the program counter accesses instructions in the program ROM, the lower bits of the program counter are simultaneously accessing an entry in the address RAM. When a valid bit of the accessed entry indicates and the page number of the accessed entry is the same as the page number in the program counter, the jump address in the accessed entry is placed into the program counter so that corrected code in the program RAM will be executed instead of the indicated faulty code in the program ROM.