Patents by Inventor Hua Chao

Hua Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090075027
    Abstract: A manufacturing process for a thermally enhanced package is disclosed. First, a substrate strip including at least a substrate is provided. Next, at least a chip is disposed on an upper surface of the substrate, and the chip is electrically connected to the substrate. Then, a prepreg and a heat dissipating metal layer are provided, and the heat dissipating metal layer is disposed on a first surface of the prepreg and a second surface of the prepreg faces toward the chip. Finally, the prepreg covers the chip by laminating the prepreg and the substrate.
    Type: Application
    Filed: July 31, 2008
    Publication date: March 19, 2009
    Applicants: ADVANCED SEMICONDUCTOR ENGINEERING, INC., ASE ELECTRONICS INC.
    Inventors: Ho-Ming Tong, Shin-Hua Chao, Ming-Chiang Lee, Tai-Yuan Huang, Chao-Yuan Liu, Yung-Cheng Huang, Teck-Chong Lee, Jen-Chieh Kao, Jau-Shoung Chen
  • Publication number: 20090062285
    Abstract: The invention relates to a sulfur-containing compound and the preparation thereof. The invention also relates to the uses of the sulfur-containing compound in inhibiting inducible nitric oxide synthase and/or cyclooxygenase-2 and in treating the diseases associated with inducible nitric oxide synthase and/or cyclooxygenase-2. This invention also describes a series of chemical analogues of the said sulfur-containing compound and the preparation of these compounds.
    Type: Application
    Filed: July 14, 2008
    Publication date: March 5, 2009
    Applicant: National Sun Yat-Sen University
    Inventors: Jyh-Horng Sheu, Chih-Hua Chao, Zhi-Hong Wen
  • Patent number: 7445944
    Abstract: A packaging substrate and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, a first packaging substrate including several first substrate units and at least one defected substrate unit is provided. Next, the defected substrate unit is separated from the packaging substrate, and at least one opening is formed in a frame of the first packaging substrate correspondingly. Then, a second substrate unit is provided. The shape of the second substrate unit is different from the shape of the opening. Afterwards, the second substrate unit is disposed in the opening.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: November 4, 2008
    Assignee: ASE (Shanghai) Inc.
    Inventors: Ho-Ming Tong, Teck-Chong Lee, Chao-Fu Weng, Chian-Chi Lin, Che-Ya Chou, Shin-Hua Chao, Song-Fu Yang, Kao-Ming Su
  • Publication number: 20080253492
    Abstract: A circuit for controlling a mixed mode controlled oscillator. The circuit comprises a charge pump, and a digital loop filter. The charge pump is coupled to the mixed mode controlled oscillator. The charge pump receives an up/down signal and sends a current signal to the mixed mode controlled oscillator. The digital loop filter receives the up/down signal and generates a digital code signal to the mixed mode controlled oscillator. An output frequency of the mixed mode controlled oscillator is controlled by the current signal and the digital code signal.
    Type: Application
    Filed: April 1, 2008
    Publication date: October 16, 2008
    Applicant: MEDIATEK INC.
    Inventors: Ping-Ying Wang, Kuan-Hua Chao, Jeng-Horng Tsai
  • Publication number: 20080124836
    Abstract: A packaging substrate and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, a first packaging substrate including several first substrate units and at least one defected substrate unit is provided. Next, the defected substrate unit is separated from the packaging substrate, and at least one opening is formed in a frame of the first packaging substrate correspondingly. Then, a second substrate unit is provided. The shape of the second substrate unit is different from the shape of the opening. Afterwards, the second substrate unit is disposed in the opening.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 29, 2008
    Inventors: Ho-Ming Tong, Teck-Chong Lee, Chao-Fu Weng, Chian-Chi Lin, Che-Ya Chou, Shin-Hua Chao, Song-Fu Yang, Kao-Ming Su
  • Publication number: 20080044931
    Abstract: A packaging substrate and a method of manufacturing the same are provided. The method includes following steps. First, a first substrate including at least one defected packaging unit and several first packaging units is provided. The defected packaging unit and the first packaging units are arranged in an array on the first substrate. Next, the defected packaging unit is removed from the first substrate to correspondingly form at least one opening in the first substrate. Then, a second substrate including at least one second packaging unit is provided. Later, the second packaging unit is separated from the second substrate. The area of the second packaging unit is less than that of the opening. Subsequently, the second packaging unit is disposed in the opening. The edge of the second packaging unit is placed partially against an inner wall of the opening.
    Type: Application
    Filed: December 28, 2006
    Publication date: February 21, 2008
    Inventors: Ho-Ming Tong, Kao-Ming Su, Chao-Fu Weng, Che-Ya Chou, Shin-Hua Chao, Teck-Chong Lee, Song-Fu Yang, Chian-Chi Lin
  • Publication number: 20070280086
    Abstract: A laser power control system and related method for reducing a settling time in a target laser power transition are disclosed. The laser power control system includes a state decision circuit, for generating a state decision signal according to a selected operational state of a target circuit; a plurality of buffers, for storing a plurality of control data corresponding to a plurality of candidate operational states of the target circuit respectively; and a multiplexer, coupled between the state decision circuit and the buffers, for coupling a selected buffer of the buffers and the target circuit according to the state decision signal for outputting a control datum stored in the selected buffer to the target circuit.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 6, 2007
    Inventors: Ming-Jiou Yu, Chun-Yu Lin, Kuo-Jung Lan, Kuan-Hua Chao, Chia-Wei Liao, Chih-Ching Chen, Shu-Hung Chou
  • Publication number: 20070228793
    Abstract: A theft protection chair structure for motor vehicles for minimizing the driving space for the driver, includes: a chair having a chair seat and a chair back connected to the chair seat by a pin-jointed structure; a chair driving structure for driving the chair to go forward or backwards toward the driving space, to form a theft protection or a sitting state; and an angular adjustment device for adjusting the slant angle between the chair back and chair seat. When the chair driving structure is in a theft protection state, the angular adjustment device enables the angle between the chair back and chair seat to be an acute angle, then be locked and fixed. Thus, the theft protection effect is provided via the angular adjustment device and chair driving structure to reduce the driving space.
    Type: Application
    Filed: August 31, 2006
    Publication date: October 4, 2007
    Inventors: Kang-Hua Chao, Shinka Naka
  • Publication number: 20070174512
    Abstract: The conventional I/O devices of a storage element, such as memory card, have a built-in microprocessor control unit (MCU) for executing the I/O commands. The demand of MCU increases the cost. Besides, the capacity of the storage element supported by the device is depend on the firmware inside the MCU. Since the updating of firmware is a tough job, the supportability is lack of elasticity. This invention discloses a method for driving the I/O device of storage element that strengthens the device driver to get rid of the MCU. The capacity supported hence can be raised by merely updating the device driver.
    Type: Application
    Filed: November 29, 2005
    Publication date: July 26, 2007
    Inventors: Hsiang-Hua Chao, Yu-Hung Liu, Yi-Chen Ho, Yi-Chin Huang, Yu-Shen Liu
  • Publication number: 20070130534
    Abstract: The present invention discloses a graphic user interface (GUI) of a computer software. When users perform the actions of copying, pasting and cutting, the users need to open several windows to perform these actions. The results in that users are persecuted by too many windows. Accordingly, the present invention provides a graphic user interface. The graphic user interface provides two or more divisional windows. The divisional windows are comfortable for user to perform file copying, cutting and pasting.
    Type: Application
    Filed: December 2, 2005
    Publication date: June 7, 2007
    Inventors: Yu-Shen Liu, Hsiang-Hua Chao
  • Publication number: 20070119931
    Abstract: The conventional apparatus for reading/writing storage devices need a built-in microprocessor control unit (MCU) to process commands. Thus, the flexiability (e.g.: supporting capacity of storage device) and the cost of the apparatus are not satisfied. The present invention employs a driver and a hardwire circuit to replace the MCU for money saving without changing other units in the apparatus. Moreover, the apparatus of the present invention can raise the supporting capacity of storage device and compatibility by just updating the driver.
    Type: Application
    Filed: November 25, 2005
    Publication date: May 31, 2007
    Applicant: C-Media Electronics Inc.
    Inventors: Yu-Hung Liu, Yi-Chen Ho, Yi-Chin Huang, Hsiang-Hua Chao, Yu-Shen Liu
  • Publication number: 20070046314
    Abstract: A process for testing IC wafer is disclosed. Prior to electrically testing chips on a wafer, the wafer is pre-cut to form a plurality of grooves aligned with the scribe lines on the active surface of the wafer. A step of singulating the wafer is performed to form a plurality of individual chips after completing electrical or reliability test of the chips. Due to the pre-cutting step the chips are still integrated on the wafer for accurately probing and testing. And the testing step can obtain the influence of defects between the test terminals and a UBM layer on the function of the chips.
    Type: Application
    Filed: October 31, 2006
    Publication date: March 1, 2007
    Inventors: Shin-Hua Chao, Yao-Hsin Feng
  • Patent number: 7151317
    Abstract: A multi-chip package structure comprising a first chip, a patterned lamination layer, a plurality of first bumps, a second chip and second bumps is provided. The first chip has a first active surface. The patterned lamination layer is disposed on a portion area of the first active surface. The first chip has a plurality of first bonding pads disposed on the first active surface exposed by the patterned lamination layer and the patterned lamination layer has a plurality of second bonding pads disposed thereon. The second chip has a second active surface and the first bumps are disposed on the second active surface. The second chip is electrically connected to the first bonding pads through the first bumps. The second bumps are disposed on the second bonding pads. Moreover, the multi-chip package structure further comprises a component disposed on the first chip and electrically connects to the first bonding pads.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: December 19, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shin-Hua Chao, Jian-Wen Lo
  • Publication number: 20060128400
    Abstract: The present invention discloses a method of transmitting a first signal and a second signal in a wideband code-division multiple access network, wherein a probability of the appearance of signal bit “1” or “0” in each signal of the first signal and the second signal is remarkably higher than a probability of the appearance of “0” or “1”, the method including: a step of determining constellation points, for determining combinations of different states of the first signal and the second signal and for determining each combination as a constellation point; a step of determining locations of constellation points, for determining a location of each constellation point on I-Q plane based on a priori knowledge of said combination; and a step of transmission, for, after modulating said different combinations in different ways according to the location of each constellation point, transporting them to a user equipment via a physical channel.
    Type: Application
    Filed: December 7, 2005
    Publication date: June 15, 2006
    Inventors: Zongchuang Liang, Hua Chao, Xin Xu, Luoning Gui
  • Publication number: 20060128433
    Abstract: The present invention discloses a method of transmitting a notification indicator of multimedia broadcast/multicast services in wideband code-division multiple access, the method including: a step of extracting notification indicator information by a radio network controller from a notification message of the multimedia broadcast/multicast services; a step of transmitting the notification indicator information to physical layer and building a notification indicator channel frame via a frame protocol layer; and a step of transmitting the notification indicator channel frame to user terminals via a physical channel. According to the method of transmitting a notification indicator of the present invention, user terminals can accurately read the notification indicator within the time length of one frame, so that the false alarm ratio and transmission power of the notification indicator are reduced.
    Type: Application
    Filed: December 7, 2005
    Publication date: June 15, 2006
    Inventors: Zongchuang Liang, Hua Chao, Xin Xu, Luoning Gui
  • Patent number: 7060595
    Abstract: A circuit substrate includes a board, a plurality of metal layers and an insulator. The board has a plurality of conductive traces layers and a via formed therein. The metal layers are formed on the inner wall of the via and each of the metal layers is electrically connected to its corresponding conductive traces layer. The via is filled with the insulator so that each of the metal layers is electrically isolated from each other. In addition, this invention also provides a fabrication method of the circuit substrate.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: June 13, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: In-De Ou, Chih-Pin Hung, Chia-Shang Chen, Kuang-Hua Lin, Shin-Hua Chao
  • Publication number: 20060103020
    Abstract: A circuit structure of a redistribution layer (RDL) is suitable for a chip to define the circuits and the contact window required by the following bump process. The RDL is disposed on the active surface of the chip. The circuit structure of the RDL mainly includes a first titanium layer, a second titanium layer and a conductive layer. Wherein, the conductive layer is made of aluminum; the first titanium layer and the second titanium layer cover the two surfaces of the conductive layer, respectively. The connectivity between the first titanium layer or the second titanium layer and a macromolecule polymer is stronger than the connectivity between the conductive layer and the macromolecule polymer, so that the peeling or crack caused by poor connectivity between the conductive layer and the adjacent dielectric layers are significantly improved thereby.
    Type: Application
    Filed: October 31, 2005
    Publication date: May 18, 2006
    Inventors: Ho-Ming Tong, Shin-Hua Chao, Chi-Yu Wang, Cherry Mercado Reyes
  • Patent number: 7041534
    Abstract: A semiconductor chip package mainly includes a semiconductor chip, a first dielectric layer disposed on the semiconductor chip, a plurality of conductive traces electrically connected to the semiconductor chip, a second dielectric layer disposed on the conductive traces and the first dielectric layer wherein a portion of the conductive traces are exposed from the second dielectric layer, and a plurality of contacts for external connection formed on the exposed portion of the conductive traces. The semiconductor chip has a surface including an active area, a dummy area surrounding the active area, and a plurality of bonding pads disposed on the active area. The bonding pads are electrically connected to the contacts by the conductive traces. The present invention further provides methods for manufacturing the semiconductor chip package.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: May 9, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shin Hua Chao, Jen Kuang Fang, Ho Ming Tong
  • Publication number: 20060056396
    Abstract: The present invention provides a deactivation method of multimedia broadcast multicast service for wireless communication system, comprising steps of: in SGSN, completing the context deactivation of user equipment of broadcast multicast service; in the user equipment, completing the context deactivation of user equipment of multimedia broadcast multicast service; in GGSN, completing the context deactivation of user equipment of multimedia broadcast multicast service; characterized by further comprising steps of: in SGSN, after completing the context deactivation of user equipment of multimedia broadcast multicast service, completing the context deactivation of user equipment of multimedia broadcast multicast service in a radio network controller of a radio access network.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 16, 2006
    Inventors: Hua Chao, Xin Xu, Zongchuang Liang, Yonggang Wang, He Wang, Nan Wang, Yu Chen
  • Publication number: 20050199991
    Abstract: A multi-chip package structure comprising a first chip, a patterned lamination layer, a plurality of first bumps, a second chip and second bumps is provided. The first chip has a first active surface. The patterned lamination layer is disposed on a portion area of the first active surface. The first chip has a plurality of first bonding pads disposed on the first active surface exposed by the patterned lamination layer and the patterned lamination layer has a plurality of second bonding pads disposed thereon. The second chip has a second active surface and the first bumps are disposed on the second active surface. The second chip is electrically connected to the first bonding pads through the first bumps. The second bumps are disposed on the second bonding pads. Moreover, the multi-chip package structure further comprises a component disposed on the first chip and electrically connects to the first bonding pads.
    Type: Application
    Filed: November 9, 2004
    Publication date: September 15, 2005
    Inventors: Shin-Hua Chao, Jian-Wen Lo