Abstract: A planning method for a displaying device, comprising: read and decode a device description file with a host of a planning system; display a planning interface on a screen via the host; take an object configuration step to configure at least one graphical object to the at least one display page and set an object parameter of the at least one graphical object; generate a corresponding graphical user interface configuration file via the host. When the planning system is connected to the displaying device, the host transmits the graphical user interface configuration file to the displaying device. A microcontroller of the displaying device displays a corresponding graphical user interface on the displaying module based on the graphical user interface configuration file. In this way, the operation time for the user to plan the graphical user interface could be effectively saved.

Abstract: A semiconductor package including an improved isolation bonding film and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first die bonded to a package substrate, the first die including vias extending through a substrate, the vias extending above a top surface of the substrate; a first dielectric film extending along a top surface of the package substrate, along the top surface of the substrate, and along sidewalls of the first die, the vias extending through the first dielectric film; a second die bonded to the first dielectric film and the vias; and an encapsulant over the package substrate, the first die, the first dielectric film, and the second die.

Abstract: A controller for managing a battery pack includes: a detection terminal, for transmitting an enable signal when values of battery parameters for the battery pack satisfy a sleep condition, where the enable signal enables the detection circuit to detect whether the battery pack is connected to a load and whether the battery pack is connected to the charger; and a receiving terminal, for receiving a detection result transmitted by the detection circuit. The detection result indicates whether the battery pack is connected to at least one of the load and charger. The controller controls the battery pack to enter a sleep mode of the sleep modes based on the detection result. The controller also includes a control terminal, for transmitting a control signal to control an on/off state of a charging switch and/or a discharging switch. The control signal is generated by the controller based on the detection result.

Abstract: The invention relates to a power tool that can be held with one hand for reversing, comprising: a casing having a grip part and a manipulation port; a driving device having a control member; the control member is capable of controlling an actuation direction of the driving device; a power source disposed below the driving device and capable of driving the driving device; a reversing assembly disposed at a periphery of the power source and having a reversing member; the reversing member controls the control member to generate changes of displacement, a driving direction of the driving device is changed by action of turning the reversing assembly that is away from the driving device, and there is an appropriate manipulating distance between the grip part and the manipulation port, so that a user is capable of manipulating by holding and reversing the power tool with one hand at a same position.

Abstract: The present disclosure relates to a semiconductor structure. The semiconductor structure includes a lower electrode over a substrate, a first capacitor dielectric layer over the lower electrode, an intermediate electrode over the first capacitor dielectric layer, and a second capacitor dielectric layer is over the intermediate electrode. An upper electrode is over the second capacitor dielectric layer. The upper electrode is completely confined over the intermediate electrode. A first protection layer is completely confined over the intermediate electrode. The first protection layer covers opposing sidewalls of the upper electrode and upper surfaces of the intermediate electrode and the upper electrode.

Abstract: A method includes forming a plurality of dielectric layers over a semiconductor substrate, etching the plurality of dielectric layers and the semiconductor substrate to form an opening, depositing a first liner extending into the opening, and depositing a second liner over the first liner. The second liner extends into the opening. The method further includes filling a conductive material into the opening to form a through-via, and forming conductive features on opposing sides of the semiconductor substrate. The conductive features are electrically interconnected through the through-via.

Abstract: The present disclosure relates to a semiconductor device structure. The semiconductor device structure has a first conductive layer disposed over a substrate and a first capacitor dielectric layer comprising a first dielectric material disposed over the first conductive layer. A second conductive layer is over the first capacitor dielectric layer, a second capacitor dielectric layer comprising a second dielectric material is disposed over the second conductive layer, and a third conductive layer is over the second capacitor dielectric layer. A first barrier layer is disposed between an upper surface of the first conductive layer and a lower surface of the first capacitor dielectric layer.

Abstract: A capacitor structure for a power semiconductor device includes a semiconductor substrate, an isolation insulating layer having a ring-shape and including an outer periphery and an inner periphery defining an opening region, a first electrode disposed on the isolation insulating layer, a dielectric layer disposed on the first electrode, and a second electrode disposed on the dielectric layer.

Abstract: In a battery management controller, analog-to-digital conversion circuitry converts analog signals, indicative of a battery voltage, a battery current, and a battery temperature, to digital signals. A memory stores a remaining-capacity lookup table that includes multiple groups of data. Each group of data includes a voltage, a current, a temperature, and a parameter associated with a remaining capacity corresponding to the voltage, the current and the temperature. A processor searches the lookup table for a current parameter value and an end-of-discharge parameter value based on the digital signals, and determines a full available charge capacity of the battery based on the current parameter value and the end-of-discharge parameter value. The processor also counts the number of charges flowing through the battery based on a battery current. The processor further determines an available state of charge of the battery according to the full available charge capacity and the number of charges.

Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. In one embodiment, a method for capping a copper surface on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a contaminated copper surface and a dielectric surface, exposing the contaminated copper surface to a reducing agent while forming a copper surface during a pre-treatment process, exposing the substrate to a cobalt precursor gas to selectively form a cobalt capping layer over the copper surface while leaving exposed the dielectric surface during a vapor deposition process, and depositing a dielectric barrier layer over the cobalt capping layer and the dielectric surface.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.

Abstract: A semiconductor device assembly is provided. The assembly includes a support layer with an inside surface, a semiconductor device, and an encapsulant material. The encapsulant material includes a bulk material and thermally conductive nanoparticles, each nanoparticle having an electrically insulative shell and an electrically conductive core. The semiconductor device is disposed on the inside surface of the support layer, the thermally conductive nanoparticles are evenly distributed throughout the bulk material, and the encapsulant material at least partially encapsulates the semiconductor device.

Abstract: Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. In one embodiment, a method for capping a copper surface on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a contaminated copper surface and a dielectric surface, exposing the contaminated copper surface to a reducing agent while forming a copper surface during a pre-treatment process, exposing the substrate to a cobalt precursor gas to selectively form a cobalt capping layer over the copper surface while leaving exposed the dielectric surface during a vapor deposition process, and depositing a dielectric barrier layer over the cobalt capping layer and the dielectric surface.

Abstract: Processing methods for forming iridium-containing films at low temperatures are described. The methods comprise exposing a substrate to iridium hexafluoride and a reactant to form iridium metal or iridium silicide films. Methods for enhancing selectivity and tuning the silicon content of some films are also described.

Abstract: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.

Abstract: A semiconductor device assembly is provided. The assembly includes a package substrate which has a tunneled interconnect structure. The tunneled interconnect structure has a solder-wettable surface, an interior cavity, and at least one microvia extending from the surface to the cavity. The assembly further includes a semiconductor device disposed over the substrate and a solder joint coupling the device and the substrate. The joint comprises the solder between the semiconductor device and the interconnect structure, which includes the solder on the surface, the solder in the microvia, and the solder within the interior cavity.

Abstract: A capacitor structure for a power semiconductor device includes a semiconductor substrate, an isolation insulating layer having a ring-shape and including an outer periphery and an inner periphery defining an opening region, a first electrode disposed on the isolation insulating layer, a dielectric layer disposed on the first electrode, and a second electrode disposed on the dielectric layer.

Abstract: An electronic package is provided, in which an electronic structure is embedded in an encapsulation layer, a protective layer is formed on the encapsulation layer, an insulating layer is formed on the protective layer, and at least one blind via is formed penetrating through the insulating layer and the protective layer, so that the electronic structure is exposed from the blind via to make a circuit layer formed on the insulating layer extending into the blind via to electrically connect the electronic structure. Therefore, by the double layer design of the insulating layer and the protective layer, voids generated by the process are free from being transferred to the insulating layer to avoid the voids remaining in the circuit layer.

Abstract: A system and method for managing a respiratory condition of a user is disclosed. The system includes an oxygen concentrator having a compression system configured to generate oxygen enriched air for delivery to the user. A physiological sensor is configured to collect physiological data of the user. The physiological data is of one or more data types. An operational sensor is configured to collect operational data of the oxygen concentrator during operation of the oxygen concentrator. The operational data is of one or more data types. A processor is configured to receive the collected physiological data and the operational data and compute a summary parameter for values of each data type. The processor is also configured to compute a health score from the summary parameter values.