Patents by Inventor Hua-Han Lee

Hua-Han Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8166088
    Abstract: An implement method of a FFT processor comprises the following steps. First, a 21 point FFT processor, which has an output and an input receiving a 2n+1 point data, is provided. A 2n-point FFT processor having an input and an output is provided. Sequentially, a multiplexer, which has a first input coupled to the output of the 21 point FFT processor, a second input receiving a 2n point data and an output coupled to the input of the 2n point FFT processor, is provided. When an input data is a 2n point data, the second input of multiplexer is coupled to the output thereof, and when an input data is a 2n+1 point data, the first input of multiplexer is coupled to the output thereof.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: April 24, 2012
    Assignee: Via Technologies, Inc.
    Inventors: Hua-Han Lee, I-Hung Lin
  • Publication number: 20090089349
    Abstract: Computing an angle between a real part and an imaginary part of a complex number includes receiving complex number data; generating a first value, a second value and a determination result according to the complex number data; choosing a dividend and a divisor of a division operation from the first value and the second value for generating a division result according to magnitudes of the first value and the second value; performing table look-up for the division result to generate a table look-up result according to a preserved table; and adjusting the table look-up result for generating an angle corresponding to the complex number data according to the determination result.
    Type: Application
    Filed: November 15, 2007
    Publication date: April 2, 2009
    Inventors: Chi-Tung Chang, Hua-Han Lee, Yu-Ling Chen
  • Publication number: 20070180011
    Abstract: An implement method of a FFT processor comprises the following steps. First, a 21 point FFT processor, which has an output and an input receiving a 2n+1 point data, is provided. A 2n-point FFT processor having an input and an output is provided. Sequentially, a multiplexer, which has a first input coupled to the output of the 21 point FFT processor, a second input receiving a 2n point data and an output coupled to the input of the 2n point FFT processor, is provided. When an input data is a 2n point data, the second input of multiplexer is coupled to the output thereof, and when an input data is a 2n+1 point data, the first input of multiplexer is coupled to the output thereof.
    Type: Application
    Filed: December 11, 2006
    Publication date: August 2, 2007
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Hua-Han Lee, I-Hung Lin