Patents by Inventor Hua Shao

Hua Shao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980032
    Abstract: The present application discloses a method for manufacturing a SONOS memory, including: providing a substrate, wherein a first transistor gate of the SONOS memory and a first layer used for forming a second transistor gate are formed on the substrate; forming a patterned second layer on the upper surface of the first layer, wherein the second layer exposes the first layer corresponding to the outer side of the second transistor gate; performing first etching on the first layer exposed by the second layer; removing the second layer; and performing second etching on the first layer to form the second transistor gate. The present application also discloses a SONOS memory. The present application can form a vertical structure outside a selective transistor and a storage transistor, thus forming a vertical side wall in the subsequent process, so as to improve the performance of the device.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: May 7, 2024
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Xiaoliang Tang, Naoki Tsuji, Haoyu Chen, Hua Shao
  • Publication number: 20240145342
    Abstract: In an embodiment, a package includes an encapsulant laterally surrounding a first integrated circuit device and a second integrated circuit device, wherein the first integrated circuit device includes a die and a heat dissipation structure over the die; a sealant disposed over the heat dissipation structure; an adhesive disposed over the second integrated circuit device; and a lid disposed over the sealant and the adhesive, wherein the lid includes a first cooling passage and a second cooling passage, the first cooling passage including an opening at a bottom of the lid and aligned to the heat dissipation structure, the second cooling passage including channels aligned to the second integrated circuit device and being distant from the bottom of the lid.
    Type: Application
    Filed: January 10, 2023
    Publication date: May 2, 2024
    Inventors: Tung-Liang Shao, You-Rong Shaw, Yu-Sheng Huang, Chen-Hua Yu
  • Publication number: 20240137795
    Abstract: This application relates to the field of communications technologies. A method includes: A first device receives first configuration information sent by a second device. The first configuration information includes at least one of information about a reference signal, frequency range information of a radio frequency signal, or bandwidth range information. The first device measures a first reference signal set, to obtain a first measured value. The first reference signal set includes at least two reference signals. The first device determines an expansion factor ? based on the first configuration information. The first device determines a second measured value based on the first measured value and the expansion factor ?.
    Type: Application
    Filed: October 24, 2023
    Publication date: April 25, 2024
    Inventors: Mao Yan, Huang Huang, Hua Shao, Lei Chen
  • Patent number: 11965089
    Abstract: A microspheric ionomer having a cross-linked structure, a preparation method therefor, applications thereof, and a preparation system thereof. The ionomer comprises structure units A represented by formula (1), structure units B represented by formula (2), and a cross-linking structure provided by a cross-linking agent, M being separately selected from H, a metal cation, and a straight chain, a saturated alkyl of branched or ring-shaped C1-C20, R being H or a methyl; and metal cations are introduced to part of structure units A in the ionomer. The ionomer shows an outstanding effect on nucleation of PET, serves as a nucleating agent for PET modification, so as to obtain a corresponding PET composition.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: April 23, 2024
    Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, BEIJING RESEARCH INSTITUTE OF CHEMICAL INDUSTRY, CHINA PETROLEUM & CHEMICAL CORPORATION
    Inventors: Wenbo Song, Hao Yuan, Zhenjie Liu, Jinliang Qiao, Shijun Zhang, Hua Yin, Huijie Hu, Qing Shao, Jie Zhang, Xiaomeng Zhang, Dezhan Li, Fuyong Bi
  • Patent number: 11955378
    Abstract: A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang
  • Patent number: 11954986
    Abstract: A self-service apparatus having a three-layer system architecture includes an application-layer device, an intermediate-layer device, and bottom-layer peripheral devices. The application-layer device is configured to provide a user interface for self-service and control the entire self-service apparatus according to an interaction with the user to provide the user with required self-service, and comprises a first processor and a first memory. The first processor executes an application program stored in the first memory and communicates with the intermediate-layer device. The intermediate-layer device comprises a terminal control module which comprises a second processor and a second memory. The second processor communicates with the bottom-layer peripheral devices, and the second processor executes a control program stored in the second memory to control operations of the peripheral devices based on an instruction from the application-layer device.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: April 9, 2024
    Assignee: Elo Touch Solutions, Inc.
    Inventors: Yin Sun, Xueqing Wei, Jinfeng Zhang, Hua Shao
  • Patent number: 11955405
    Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Jen Yu Wang, Chung-Jung Wu, Sheng-Tsung Hsiao, Tung-Liang Shao, Chih-Hang Tung, Chen-Hua Yu
  • Publication number: 20240110900
    Abstract: A method for rapidly detecting pesticides based on thin-layer chromatography (TLC) and enzyme inhibition principles. The method includes the following steps: cutting a TLC plate into a rectangle, and using one end of the rectangle to contact a sample extract to form a pesticide residue separation area; covering the other end of the rectangle with a small piece cut from filter paper or glass fiber and fixing on a piece of enzyme inhibition reaction test paper to form a pesticide enrichment area; pasting a side of the enzyme inhibition reaction test paper away from the pesticide residue separation area with a piece of filter paper immobilized with a chromogenic agent to form a substrate color development area; and performing color reaction.
    Type: Application
    Filed: July 21, 2023
    Publication date: April 4, 2024
    Applicant: INSTITUTE OF QUALITY STANDARD AND TESTING TECHNOLOGY FOR AGRO-PRODUCTS, CAAS
    Inventors: Miao WANG, Jing WANG, Yunling SHAO, Yongxin SHE, Maojun JIN, Zhen CAO, Shanshan WANG, Lufei ZHENG, Hua SHAO, Fen JIN
  • Publication number: 20240106235
    Abstract: A high anti-interference microsystem based on System In Package (SIP) for a power grid is provided. The high anti-interference microsystem comprises a ceramic cavity, a ceramic substrate, a magnetic cover plate, a digital signal processing circuit, an analog signal conditioning circuit and a shield, wherein the ceramic cavity supports the ceramic substrate, the magnetic cover plate is in sealed contact with the ceramic cavity, and the ceramic substrate is arranged in a cavity formed by the ceramic cavity and the magnetic cover plate; a sealed shell of the microsystem based on SIP is composed of the magnetic cover plate and the ceramic cavity; the digital signal processing circuit and the analog signal conditioning circuit are arranged on the ceramic substrate and respectively process received signals to be processed; the shield covers an outer side of the sealed shell and is used for shielding external magnetic field interference.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 28, 2024
    Applicant: Electric Power Research Institute of State Grid Zhejiang Electric Power Co., LTD
    Inventors: Xianjun SHAO, Xiaoxin CHEN, Yiming ZHENG, Chen LI, Jianjun WANG, Ping QIAN, Hua XU, Shaoan WANG, Shaohe WANG, Haibao MU, Huibin TAO, Lin ZHAO, Wenzhe ZHENG, Dun QIAN
  • Publication number: 20240105550
    Abstract: A device includes an integrated circuit die attached to a substrate; a lid attached to the integrated circuit die; a sealant on the lid; a spacer structure attached to the substrate adjacent the integrated circuit die; and a cooling cover attached to the spacer structure, wherein the cooling cover extends over the lid, wherein the cooling cover attached to the lid by the sealant. In an embodiment, the device includes a ring structure on the substrate, wherein the ring structure is between the spacer structure and the integrated circuit die.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 28, 2024
    Inventors: Tung-Liang Shao, Yu-Sheng Huang, Hung-Yi Kuo, Chen-Hua Yu
  • Patent number: 11935273
    Abstract: The present disclosure relates to an object recognition system and method. The system comprises: an illumination apparatus configured to generate an illumination light for illuminating an object; a lighting sensor configured to acquire a first lighting parameter of an ambient light in a recognition environment in which the object is located; an imaging apparatus configured to acquire imaging data of the object; a first controller communicatively connected with the illumination apparatus and the lighting sensor, and configured to control a second lighting parameter of the illumination light generated by the illumination apparatus according to the first lighting parameter, until the first lighting parameter of the ambient light is within a preset parameter range; and a processor communicatively connected with the imaging apparatus and the first controller, and configured to recognize the object according to imaging data of the object under the ambient light within the preset parameter range.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: March 19, 2024
    Assignee: Elo Touch Solutions, Inc.
    Inventors: Yin Sun, Haolai Zhou, Hua Shao
  • Publication number: 20240071965
    Abstract: A package includes a first package component including a semiconductor die, wherein the semiconductor die includes conductive pads, wherein the semiconductor die is surrounded by an encapsulant; an adaptive interconnect structure on the semiconductor die, wherein the adaptive interconnect structure includes conductive lines, wherein each conductive line physically and electrically contacts a respective conductive pad; and first bond pads, wherein each first bond pad physically and electrically contacts a respective conductive line; and a second package component including an interconnect structure, wherein the interconnect structure includes second bond pads, wherein each second bond pad is directly bonded to a respective first bond pad, wherein each second bond pad is laterally offset from a corresponding conductive pad which is electrically coupled to that second bond pad.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Tung-Liang Shao, Yu-Sheng Huang, Wen-Hao Cheng, Chen-Hua Yu
  • Patent number: 11902919
    Abstract: Embodiments of this application provide a synchronization signal transmission method, a network device, and a terminal device. The method includes: determining, by a network device, time domain positions for sending m synchronization signal blocks, where the time domain positions are {s1, s2, . . . , sm}+n×T, s1 represents a start symbol index of the first synchronization signal block in a time unit, s2 represents a start symbol index of the second synchronization signal block in the time unit, sm represents a start symbol index of an mth synchronization signal block in the time unit, the time unit includes T symbols; and sending, by the network device, the synchronization signal blocks to a terminal device in the time domain positions of the synchronization signal blocks. The technical solutions provided in this application have relatively high flexibility, and can meet, to some extent, a synchronization signal block sending requirement for a high-frequency technology.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: February 13, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Kuandong Gao, Huang Huang, Mao Yan, Hua Shao
  • Publication number: 20240032536
    Abstract: The present disclosure is related to terrein functioning as a biopesticide formulation in drought resistance and growth promotion of crops. The formulation containing terrein can be treated by soaking or spraying on the crops. It is especially suitable for drought and water shortage conditions, promoting growth of plant root length, seedling height, fresh weight, and dry weight, greatly increasing crop yield, and significantly improving drought resistance of crop plants. Under the condition of seed soaking treatment with 10 ?g/mL terrein, promotion rates of root length, seedling height, fresh weight, and dry weight of pakchoi are 99.19%, 15.66%, 40.34%, and 49.12%, respectively. The source of terrein is easy to obtain and the cost is low. It has a simple structure and is easily soluble in water. In the actual application process, it only needs to simply prepare an aqueous solution or mix with other pesticide formulations for seed soaking or spraying treatment.
    Type: Application
    Filed: July 7, 2023
    Publication date: February 1, 2024
    Inventors: Hua Shao, Lijing Lei, Wei Shao, Chi Zhang
  • Patent number: 11854790
    Abstract: The disclosure discloses a global shutter CMOS image sensor, which adopts non-uniform storage diffusion region doping to reduce the junction leakage at storage points, so as to ensure that with the increase of the depth of photodiodes and the increase of pixels, all carriers in rows read subsequently can be transferred to storage diffusion regions, the loss of the carriers in the storage diffusion regions is not caused when a global shutter transistor is turned on, and the carriers can be completely transferred from the storage diffusion regions to floating diffusion regions through second transfer transistors even if the number of rows of pixel units increases during reading-out row by row. The disclosure further discloses a method for making the global shutter CMOS image sensor.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: December 26, 2023
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Zhi Tian, Zhen Gu, Hua Shao, Haoyu Chen
  • Patent number: 11838885
    Abstract: This application provides a method and an apparatus for determining an effective time of a timing advance (TA). The method includes: determining a first subcarrier spacing from M subcarrier spacings, where the M subcarrier spacings are subcarrier spacings of L carriers used by a terminal device, and L?M?2; and determining an effective time of a timing advance (TA) of each of the L carriers based on the first subcarrier spacing.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: December 5, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Hua Shao, Zhe Liu, Huang Huang
  • Patent number: 11838783
    Abstract: This application relates to the field of communications technologies. A method includes: A first device receives first configuration information sent by a second device. The first configuration information includes at least one of information about a reference signal, frequency range information of a radio frequency signal, or bandwidth range information. The first device measures a first reference signal set, to obtain a first measured value. The first reference signal set includes at least two reference signals. The first device determines an expansion factor ? based on the first configuration information. The first device determines a second measured value based on the first measured value and the expansion factor ?.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: December 5, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Mao Yan, Huang Huang, Hua Shao, Lei Chen
  • Patent number: 11735610
    Abstract: The disclosure discloses a global shutter CMOS image sensor, which adopts non-uniform storage diffusion region doping to reduce the junction leakage at storage points, so as to ensure that with the increase of the depth of photodiodes and the increase of pixels, all carriers in rows read subsequently can be transferred to storage diffusion regions, the loss of the carriers in the storage diffusion regions is not caused when a global shutter transistor is turned on, and the carriers can be completely transferred from the storage diffusion regions to floating diffusion regions through second transfer transistors even if the number of rows of pixel units increases during reading-out row by row. The disclosure further discloses a method for making the global shutter CMOS image sensor.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: August 22, 2023
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Zhi Tian, Zhen Gu, Hua Shao, Haoyu Chen
  • Patent number: 11736258
    Abstract: This application provides a system information redundancy version determining method and apparatus. A communications device determines at least one time-domain resource unit Ux, and determines a redundancy version RVx for system information on the time-domain resource unit Ux according to the time-domain resource unit Ux, where x is an identifier of the time-domain resource unit, the redundancy version RVx satisfies RVx=(Int1(X1/X2*(Int2(x/M) mod K))) mod L, x is a non-negative integer, X1 and X2 are non-zero real numbers, M is a positive real number, K and L are positive integers, mod indicates a modulo operation, Int1 indicates rounding up or rounding down, and Int2 indicates rounding up or rounding down.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: August 22, 2023
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Kuandong Gao, Huang Huang, Mao Yan, Hua Shao
  • Patent number: D1007575
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: December 12, 2023
    Assignee: Elo Touch Solutions, Inc.
    Inventors: Jinwei Zhang, Xueqing Wei, Hua Shao