Abstract: A pad conditioner for conditioning a polishing surface of a polishing pad includes a conditioning disk, a disk holder, and a disk arm. The conditioning disk includes a substrate plate and at least two abrasive segments. The conditioning disk includes at least one channel by which debris and spent slurry may be evacuated. The abrasive segments are on a surface of the substrate plate, and form at least one channel segment therebetween. Each channel segment extends from about the center of the surface to substantially the outer rim of the substrate plate. The disk holder to which the conditioning disk is mounted includes a through hole. The disk arm to which the conditioning disk is mounted includes an opening in fluid communication with the at least one channel segment via the through hole for evacuating the debris and spent slurry by a vacuum module.

Abstract: The present invention is an AI vehicle with its control system, which comprises a motorcycle or an automobile, an AI device, multiple image acquisition devices, a display device, a heat dissipation device, a power supply management device, and a three-button control switch, which may be mounted on a regular motorcycle for control of license plate image acquisition, plate detection, computation control of license plate number recognition, and control of power supply management, to achieve effects of license plate number recognition and active detection when the AI motorcycle is ridden for patrol, thus achieve effects of better investigation and crime prevention mobility; further, the AI vehicle may acquire license plate number and parking information, followed by being uploaded to a roadside parking billing computing center for calculating parking fees to achieve the effect for roadside parking billing and tolling.

Abstract: Disclosed is a method for detecting a small number of foreign cells in a cell population with high sensitivity. The method is to detect foreign cells in a sample comprising target cells and the foreign cells. In the method, one or more specific biomarkers of all cells in the sample are detected. The method comprises the step of, before extracting the total biomarkers of the sample, dividing the sample into a plurality of groups to be tested, the plurality of groups to be tested all satisfying that one foreign cell can be detected within a single system maximum sensitivity s. The detection method of the present invention can improve the sensitivity to more than one hundred thousandth.

Abstract: A pad conditioner for conditioning a polishing surface of a polishing pad includes a conditioning disk, a disk holder, and a disk arm. The conditioning disk includes a substrate plate and at least two abrasive segments. The conditioning disk includes at least one channel by which debris and spent slurry may be evacuated. The abrasive segments are on a surface of the substrate plate, and form at least one channel segment therebetween. Each channel segment extends from about the center of the surface to substantially the outer rim of the substrate plate. The disk holder to which the conditioning disk is mounted includes a through hole. The disk arm to which the conditioning disk is mounted includes an opening in fluid communication with the at least one channel segment via the through hole for evacuating the debris and spent slurry by a vacuum module.

Abstract: A polypeptide or protein directional modification method based on sulfhydryl-alkenyl azide coupling is provided. The method uses a sulfhydryl group-containing compound and a compound containing alkenyl azide group as reactants to generate an amino acid containing ?-carbonyl sulfide, a polypeptide containing ?-carbonyl sulfide and a protein bioconjugate containing ?-carbonyl sulfide, thereby achieving a chemical modification. The method is mild in conditions and wide in solvent selectivity, a reaction temperature is in a range of 37 degrees Celsius (° C.) to 40° C., and a reaction time is in a range of 10 minutes to 48 hours. The method is promising in preparing functional polypeptides or functional proteins, protein labeling, and biological medicine.

Abstract: A pad conditioner for conditioning a polishing surface of a polishing pad includes a conditioning disk, a disk holder, and a disk arm. The conditioning disk includes a substrate plate and at least two abrasive segments. The conditioning disk includes at least one channel by which debris and spent slurry may be evacuated. The abrasive segments are on a surface of the substrate plate, and form at least one channel segment therebetween. Each channel segment extends from about the center of the surface to substantially the outer rim of the substrate plate. The disk holder to which the conditioning disk is mounted includes a through hole. The disk arm to which the conditioning disk is mounted includes an opening in fluid communication with the at least one channel segment via the through hole for evacuating the debris and spent slurry by a vacuum module.

Abstract: A measurement circuit and a measurement method for measuring and updating a voltage resolution of an electronic atomizer circuit are provided. In the measurement circuit, a comparison unit is configured to compare a first preset value and a second preset value to obtain a voltage difference, an accumulation and subtraction unit is configured to perform counting according to a comparison result, and a control unit is configured to adjust the voltage difference between two compared voltage input terminals, thereby calculating a voltage resolution of the control unit, avoiding the impact of the actual error of the first constant current source and the unit resistor on the actual voltage resolution, and ensuring the measurement accuracy. In addition, an accurate to-be-measured voltage is calculated, and a measurement value of the to-be-measured voltage is corrected, to ensure the high measurement accuracy of the to-be-measured voltage and the output power.

Abstract: A chip design verification system and method, and a computer readable recording medium with a stored program are provided for verifying a module under test. The chip design verification system is configured to: transmitting, by the driver module, the test data sets to the result verification module and performing, by the driver module, a write procedure to write the test data sets into the storage space modules; performing, by the module under test, an autoload function to load the test data sets stored in the storage space modules into the registers correspondingly; and reading, by the result verification module, a plurality of first readout values corresponding to the test data sets at the registers according to the location data of each of the test data sets and comparing, by the result verification module, the test data sets with the first readout values to determine whether the autoload function operates normally.

Abstract: A method a for controlling a distribution sequence for a semiconductor device includes: acquiring the quantity of all chambers and an actual working duration of each radio frequency device in the machines; providing an optimal working duration of the radio frequency device to calculate an average interval; sorting all the data to form a first queue data set, and obtaining a difference between adjacent data in the first queue data set; using a difference between adjacent consecutive data as a feature value corresponding to the former or latter data in the consecutive data, and using data that does not correspond to the difference as a feature value corresponding to the data; obtaining a second queue data set and a third queue data set; and obtaining a distribution sequence of distributing N batches of wafers to all the radio frequency devices.

Abstract: A reverse current suppression circuit for a PMOS transistor, which includes: a gate drive unit, when the source potential of the first PMOS transistor is lower than the drain potential, the gate drive unit making the gate potential of the first PMOS transistor equal to the drain potential, so that the first PMOS transistor comes into a reverse current suppression state; and a substrate switching unit, when the source potential of the first PMOS transistor is lower than the drain potential, the substrate switching unit short-circuiting the substrate of the first PMOS transistor with the drain of the first PMOS transistor. According to the present invention, when the source potential of the PMOS transistor is lower than the drain potential, the PMOS transistor can be controlled to operate in the reverse current suppression state, so that the PMOS transistor can be effectively protected.

Abstract: A reverse current suppression circuit for a PMOS transistor, which includes: a gate drive unit, when the source potential of the first PMOS transistor is lower than the drain potential, the gate drive unit making the gate potential of the first PMOS transistor equal to the drain potential, so that the first PMOS transistor comes into a reverse current suppression state; and a substrate switching unit, when the source potential of the first PMOS transistor is lower than the drain potential, the substrate switching unit short-circuiting the substrate of the first PMOS transistor with the drain of the first PMOS transistor. According to the present invention, when the source potential of the PMOS transistor is lower than the drain potential, the PMOS transistor can be controlled to operate in the reverse current suppression state, so that the PMOS transistor can be effectively protected.

Abstract: The present invention provides a measurement circuit and a measurement method. In the measurement circuit, a comparison unit is configured to compare a first preset value and a second preset value to obtain a voltage difference, an accumulation and subtraction unit is configured to perform counting according to a comparison result, and a control unit is configured to adjust the voltage difference between two compared voltage input terminals, thereby calculating a voltage resolution of the control unit, avoiding the impact of the actual error of the first constant current source and the unit resistor on the actual voltage resolution, and ensuring the measurement accuracy. In addition, an accurate to-be-measured voltage is calculated, and a measurement value of the to-be-measured voltage is corrected, to ensure the high measurement accuracy of the to-be-measured voltage and the output power.

Abstract: A chip verification system includes a plurality of agent modules, a register model, and a scoreboard module. The register model includes a register database, a plurality of access modules, and a return module. Each access module corresponds to one of a plurality of attribute parameters. Each agent module transmits an address code of its sequence to the return module. The return module obtains, according to the received address code, an address subject and the attribute parameter corresponding to the received address code from the register database, and outputs the obtained attribute parameter. Each driver module calls, according to the received attribute parameter, the corresponding access module to perform an operation on registers of DUT circuit according to a read write command of the sequence. The scoreboard module records each performed operation to generate an operation record, and outputs a verification result according to the operation record and data in registers.

Abstract: A chip verification system includes a plurality of agent modules, a register model, and a scoreboard module. The register model includes a register database, a plurality of access modules, and a return module. Each access module corresponds to one of a plurality of attribute parameters. Each agent module transmits an address code of its sequence to the return module. The return module obtains, according to the received address code, an address subject and the attribute parameter corresponding to the received address code from the register database, and outputs the obtained attribute parameter. Each driver module calls, according to the received attribute parameter, the corresponding access module to perform an operation on registers of DUT circuit according to a read write command of the sequence. The scoreboard module records each performed operation to generate an operation record, and outputs a verification result according to the operation record and data in registers.

Abstract: Embodiments of the present disclosure provide a method and a device for determining a fabrication chamber. According to a current radio frequency power time of each of the fabrication chambers corresponding to adjacent process steps and service phases divided based on a service period of the fabrication chambers, a service phase is determined for the current radio frequency power time of each of the fabrication chambers. For target objects processed by the fabrication chambers in the current process step, fabrication chambers for the target objects to enter in a next process step are directly determined according to the service phase of the current radio frequency power time of each of the fabrication chambers.

Abstract: A variable speed transmission is disclosed, with a transmission apparatus which includes a planetary gear set having a ring gear and a sun gear. The variable speed transmission further includes a primary engine for powering the sun gear, a braking device engaging the ring gear, and a controller configured to alter the rotational speed of the ring gear by adjusting the braking device.

Abstract: A method of testing a slave device of an Inter-Integrated Circuit (I2C) bus is provided. The method includes the following steps: (A) starting a first read operation or a first write operation of the slave device, the first read operation or the first write operation including a sub-operation of sending a command, an acknowledgement signal, data, an address or a control byte to the slave device; (B) sending a start command or an end command to the slave device after or during the sub-operation; (C) after step (B), performing a second read operation or a second write operation on the slave device; and (D) after step (C), determining whether the second read operation or the second write operation is correctly performed.

Abstract: A cross-platform point exchange system and a method thereof are disclosed herein. The system comprises an E-business platform, a point exchange platform and a game platform. The point exchange platform receiving member data of a member from the E-business platform, generating a webpage having a game list according to the games provides by the game platform, and receiving game selection information input by the member. The point exchange platform converts the feedback points in the member data into game points of a loyalty card and provides the game points to a selected game corresponding to the game selection information. Via the connection of the E-business platform, the point exchange platform and the game platform, the present invention can convert the feedback points of the E-business platform into game points, to expand the application field of bonus points and accelerate the digestion of bonus points.

Abstract: Disclosed herein are bionanoparticles of adipose-derived stem cell extracellular vesicles, a tissue repair matrix comprising the bionanoparticles, and methods of use thereof for enhanced tendon healing.

Abstract: A field-effect-transistor includes forming a fin structure on a substrate, a gate structure formed across each fin structure and covering a portion of top and sidewall surfaces of the fin structure, a first doped layer, made of a first semiconductor material and doped with first doping ions, in each fin structure on one side of the corresponding gate structure, and a second doped layer, made of a second semiconductor material, doped with second doping ions, and having doping properties different from the first doped layer, in each fin structure on another side of the corresponding gate structure.