Abstract: A signal transmission device includes a transceiver circuitry and a control circuitry. The transceiver circuitry is configured to receive first device data from an external device through a channel. The control circuitry is configured to calculate a least one system parameter of the transceiver circuitry based on the first device data, second device data associated with the transceiver circuitry, and at least one requirement of a predetermined communication protocol, in order to link with the external device.

Abstract: A signal transmission device includes a transceiver circuitry and a control circuitry. The transceiver circuitry is configured to receive first device data from an external device through a channel. The control circuitry is configured to calculate a least one system parameter of the transceiver circuitry based on the first device data, second device data associated with the transceiver circuitry, and at least one requirement of a predetermined communication protocol, in order to link with the external device.

Abstract: An integrated circuit, a multi-channel transmission apparatus, and a signal transmission method thereof are provided. The multi-channel transmission apparatus includes a pre-stage circuit, a clock signal generator, and a post-stage circuit. The pre-stage circuit receives a plurality of first clock signals and a plurality of data signals, selects one of the first clock signals to be a base clock signal, and transmits the data signals according to the base clock signal to respectively generate a plurality of middle signals. The clock signal generator generates the first clock signals according to a second clock signal, wherein a frequency of the second clock signal is higher than a frequency of the first clock signals. The post-stage circuit transmits the middle signals according to the second clock signal to respectively generate a plurality of output signals. The pre-stage circuit is a digital circuit, and the post-stage circuit is an analog circuit.

Abstract: A measurement system of a data transmission interface includes a signal generator and a signal receiver. The signal generator transmits an input data to the data transmission interface. The signal receiver receives an output data from the data transmission interface. The signal receiver measures a jitter tolerance capability of the data transmission interface according to error feedback data of the output data. The data transmission interface includes a receiving circuit, a synchronous circuit, and a transmitting circuit. The receiving circuit receives the input data and generates an error signal when a data error occurs. The synchronous circuit receives the error signal to generate an error indication signal. The transmitting circuit transmits the output data to the signal receiver and receives the error indication signal when the data error occurs, in order to generate the error feedback data in the output data according to the error indication signal.

Abstract: An equalizer control method is provided, where the method may write a plurality of parameters into a programmable filter pattern register file of a receiver to set up the programmable filter pattern register file. The receiver includes a plurality of equalization settings for selection, and the method may further perform selection between the equalization settings of the receiver according to the parameters of the programmable filter pattern register file and a signal sequence received by the receiver. An associated equalizer control apparatus is also provided, where the equalizer control apparatus is disposed in a receiver. The receiver includes a plurality of equalization settings, and the equalizer control apparatus applies the equalizer control method to perform selection between the equalization settings of the receiver.

Abstract: When a NAS apparatus is directly connected to a network and an external apparatus simultaneously, the external apparatus is able to access the NAS apparatus, and the NAS apparatus concurrently communicates with the network for executing a specific function. A method of configuring the NAS apparatus includes: allocating a first storage unit in the NAS apparatus; and setting an attribute of the first storage unit such that the first storage unit is allowed to be read by the NAS apparatus or the external apparatus, and written by the NAS apparatus or the external apparatus.

Abstract: A hybrid system is combining transaction level modeling (TLM) simulators and hardware accelerators so that new system-on chip (SoC) designs are integrated in a virtual platform (VP) to run TLM simulation and existent semiconductor intellectual properties (IP) are added to physical platform (PP) to run hardware accelerator. A new circuit design with TLM is easier to be performed than with register transfer language (RTL) and it is integrated in a virtual platform and existent IP doesn't have to be redesigned to be integrated in a virtual platform.