Abstract: A brake fluid pipe detector is provided. The brake fluid pipe detector which is arranged between a brake hose and a brake caliper include a main body which is provided with a fastening end for connection to the brake caliper and is communicating with the brake hose for delivering brake fluid. The brake fluid pipe detector features on that at least one installation port is arranged at the main body and installed with a sensor correspondingly. Thereby brake data and information such as working temperature and brake pressure of the brake fluid in the brake hose and the brake caliper can be detected by the sensor so as to ensure driving safety.

Abstract: A brake temperature detector including a display unit, at least one signal transmitter, and a plurality temperature sensing modules is provided. The temperature sensing modules are mounted in a brake system of vehicles correspondingly and each of the temperature sensing modules includes a temperature sensor wire and a connector disposed on an end part of the temperature sensor wire. Temperature changes caused by high speed friction in the brake system sensed by the connector are transmitted to the signal transmitter and sensed results are shown on the display unit. Thereby drivers can learn working temperature and data of the brake system. By temperature monitoring, brake overheating which leads to brake failure can be avoided. Moreover, problems of the brake system (such as brake disc, brake caliper, or lining) can be found earlier by temperature difference to ensure driving safety.

Abstract: A boot data reading system includes a storage circuit and a processor circuit. The storage circuit is configured to store first boot data and second boot data. The first boot data includes a first segment and a second segment. The second boot data includes a third segment, and the third segment corresponds to the first segment. The processor circuit is coupled to the storage circuit. The processor circuit reads the first segment and determines whether the first segment is correct or not. When the first segment is correct, the processor circuit reads the second segment and determines whether the second segment is correct or not. When the first segment is incorrect, the processor circuit reads the third segment and determines whether the third segment is correct or not.

Abstract: A brake fluid pipe detector is provided. The brake fluid pipe detector which is arranged between a brake hose and a brake caliper include a main body which is provided with a fastening end for connection to the brake caliper and is communicating with the brake hose for delivering brake fluid. The brake fluid pipe detector features on that at least one installation port is arranged at the main body and installed with a sensor correspondingly. Thereby brake data and information such as working temperature and brake pressure of the brake fluid in the brake hose and the brake caliper can be detected by the sensor so as to ensure driving safety.

Abstract: A method of managing blocks in a flash memory includes: detecting states of blocks of a reserved area in the flash memory and building a bad block management table accordingly; recording mappings between bad blocks of an user area in the flash memory and good blocks of the reserved area into the bad block management table; when the bad block management table indicates there is no good block remaining in the reserved area that can be mapped to, selecting one of bad blocks of the reserved area or the user area and obtaining a recollected block after erasing the selected bad block; recording a mapping between the recollected block and a bad block in the user area into the bad block management table; and based on the bad block management table, programming data into the recollected block.

Abstract: Instruction cache behavior and branch prediction are used to improve the functionality of a computing device by profiling branching instructions in an instruction cache to identify likelihoods of proceeding to a plurality of targets from the branching instructions; identifying a hot path in the instruction cache based on the identified likelihoods; and rearranging the plurality of targets relative to one another and associated branching instructions so that a first branching instruction that has a higher likelihood of proceeding to a first hot target than to a first cold target and that previously flowed to the first cold target and jumped to the first hot target instead flows to the first hot target and jumps to the first cold target.

Abstract: Embodiments of systems and methods for transmission of audio information are disclosed herein. In one example, a System on Chip (SoC) includes a wired transceiver module, a wireless module, a Frequency Modulation (FM) demodulation module, and an audio information codec module operatively coupled to the wired transceiver and the FM demodulation module. The wired transceiver module is configured to receive a data packet corresponding to first audio information. The wireless module is configured to receive an FM signal, corresponding to second audio information. The FM demodulation module is configured to output the second audio information based on demodulating the FM signal. The audio information codec module is configured to decode the first audio information and the second audio information based on the data packet and the demodulated FM signal, respectively.

Abstract: A method of managing blocks in a flash memory includes: detecting states of blocks of a reserved area in the flash memory and building a bad block management table accordingly; recording mappings between bad blocks of an user area in the flash memory and good blocks of the reserved area into the bad block management table; when the bad block management table indicates there is no good block remaining in the reserved area that can be mapped to, selecting one of bad blocks of the reserved area or the user area and obtaining a recollected block after erasing the selected bad block; recording a mapping between the recollected block and a bad block in the user area into the bad block management table; and based on the bad block management table, programming data into the recollected block.

Abstract: A method realizes synchronous playing of audio data from an audio source by two or more wireless speakers. The method includes receiving at each of the wireless speakers first audio data packets sent by the audio source and determining a respective first time point for the receiving of the first audio data packets; processing the first audio data packets at each of the wireless speakers to generate respective second audio data packets, the second audio data packets each including audio data to be played with a fixed data length; setting a delayed play time and obtaining a playing time point at each of the wireless speakers, the obtaining of the playing time point being based on the respective first time point and the respective delayed play time; and playing the second audio data packets at each of the wireless speakers at the respective playing time point.

Abstract: A printed circuit board includes a first and second core. The first core has a first conductive layer, a first non-conductive layer, a first copper layer and a first opening. The first core also has a first solder mask connected to the first copper layer and a first FR4 laminate bonded to the first solder mask. The second core has a second conductive layer, a second non-conductive layer, a second copper layer and a second opening. The second core also has a second solder mask connected to the second copper layer and a second FR4 laminate bonded to the second solder mask. A prepreg layer is between the first copper layer and the second copper layer but not between the first FR4 laminate and the second FR4 laminate.

Abstract: Instruction cache behavior and branch prediction are used to improve the functionality of a computing device by profiling branching instructions in an instruction cache to identify likelihoods of proceeding to a plurality of targets from the branching instructions; identifying a hot path in the instruction cache based on the identified likelihoods; and rearranging the plurality of targets relative to one another and associated branching instructions so that a first branching instruction that has a higher likelihood of proceeding to a first hot target than to a first cold target and that previously flowed to the first cold target and jumped to the first hot target instead flows to the first hot target and jumps to the first cold target.

Abstract: A printed circuit board includes a first and second core. The first core has a first conductive layer, a first non-conductive layer, a first copper layer and a first opening. The first core also has a first solder mask connected to the first copper layer and a first FR4 laminate bonded to the first solder mask. The second core has a second conductive layer, a second non-conductive layer, a second copper layer and a second opening. The second core also has a second solder mask connected to the second copper layer and a second FR4 laminate bonded to the second solder mask. A prepreg layer is between the first copper layer and the second copper layer but not between the first FR4 laminate and the second FR4 laminate.

Abstract: A printed circuit board includes a first, second, and third conductive layer. The printed circuit boards also includes a first non-conductive layer between the first and second conductive layers and a second non-conductive layer between the second and third conductive layers. The printed circuit board further includes a dielectric layer between the second conductive layer and the second non-conductive layer and a coin for heat dispersion located underneath the dielectric layer. The printed circuit board also includes a cavity for receiving a component and a plating within the cavity to connect the coin with the second conductive layer. The plating extends less than 50 um above the second conductive layer.

Abstract: Embodiments of systems and methods for transmission of audio information are disclosed herein. In one example, a System on Chip (SoC) includes a wired transceiver module, a wireless module, a Frequency Modulation (FM) demodulation module, and an audio information codec module operatively coupled to the wired transceiver and the FM demodulation module. The wired transceiver module is configured to receive a data packet corresponding to first audio information. The wireless module is configured to receive an FM signal, corresponding to second audio information. The FM demodulation module is configured to output the second audio information based on demodulating the FM signal. The audio information codec module is configured to decode the first audio information and the second audio information based on the data packet and the demodulated FM signal, respectively.

Abstract: A method realizes synchronous playing of audio data from an audio source by two or more wireless speakers. The method includes receiving at each of the wireless speakers first audio data packets sent by the audio source and determining a respective first time point for the receiving of the first audio data packets; processing the first audio data packets at each of the wireless speakers to generate respective second audio data packets, the second audio data packets each including audio data to be played with a fixed data length; setting a delayed play time and obtaining a playing time point at each of the wireless speakers, the obtaining of the playing time point being based on the respective first time point and the respective delayed play time; and playing the second audio data packets at each of the wireless speakers at the respective playing time point.

Abstract: The disclosure provides a front panel assembly adapted for a computer case. The front panel assembly includes a frame, a slidable cover and at least one torsion spring. The slidable cover is slidably disposed on the frame and slidable between a covering position and an exposing position. The at least one torsion spring is connected to and located between the frame and the slidable cover so as to provide elastic energy to spring the slidable cover to the covering position or the exposing position while the slidable cover is slide on the frame.

Abstract: A dual perpendicular magnetic recording writer is disclosed wherein first and second dynamic fly height (DFH) heaters WDFH1 and WDFH2, are formed in first and second writers, respectively, on a slider in a head gimbal assembly. In one embodiment, WDFH1 and WDFH2 have front sides that are recessed behind first and second back gap connections (BGC), respectively, and join together at their respective backsides behind the interconnect which connects a bucking coil and driving coil each symmetrically disposed about a center plane separating the two writers. In another embodiment with a separate bucking coil in each writer, WDFH1 and WDFH2 are formed behind separate interconnects. Magnetic spacing loss is reduced compared with a single DFH heater spread across both writers. Close point at touchdown in a cross-track direction and the size of the touchdown area are controlled by applying a WDFH1:WDFH2 power ratio from 100:0 to 0:100.

Abstract: The disclosure provides a front panel assembly adapted for a computer case. The front panel assembly includes a frame, a slidable cover and at least one torsion spring. The slidable cover is slidably disposed on the frame and slidable between a covering position and an exposing position. The at least one torsion spring is connected to and located between the frame and the slidable cover so as to provide elastic energy to spring the slidable cover to the covering position or the exposing position while the slidable cover is slide on the frame.

Abstract: Embodiments of wireless audio systems and methods for synchronizing wireless headphones are disclosed herein. In one example, a wireless audio system includes an audio source, a first wireless headphone, and a second wireless headphone. The audio source is configured to separately transmit a left-channel audio signal and a right-channel audio signal using a short-range wireless communication protocol. The first wireless headphone is configured to receive the left-channel audio signal and synchronize a first clock of the first wireless headphone with the audio source based on the left-channel audio signal. The second wireless headphone is configured to receive the right-channel audio signal and synchronize a second clock of the second wireless headphone with the audio source based on the right-channel audio signal, so that the first clock of the first wireless headphone is synchronized with the second clock of the second wireless headphone.

Abstract: Embodiments of wireless audio systems and methods for synchronizing wireless headphones are disclosed herein. In one example, a wireless audio system includes an audio source, a first wireless headphone, and a second wireless headphone. The audio source is configured to separately transmit a left-channel audio signal and a right-channel audio signal using a short-range wireless communication protocol. The first wireless headphone is configured to receive the left-channel audio signal and synchronize a first clock of the first wireless headphone with the audio source based on the left-channel audio signal. The second wireless headphone is configured to receive the right-channel audio signal and synchronize a second clock of the second wireless headphone with the audio source based on the right-channel audio signal, so that the first clock of the first wireless headphone is synchronized with the second clock of the second wireless headphone.