Abstract: Disclosed are probes, primers, a microarray, a kit and applications for rapid detection of clinical microorganism in ophthalmology, belonging to that technical field of clinical microorganism detection. The probes of that disclosure comprise probes for respectively detect Staphylococcus epidermidis, Staphylococcus aureus, Staphylococcus haemolyticus, Pseudomonas aeruginosa, Staphylococcus hominis, Serratia marcescens, Escherichia coli, Bacillus subtilis and Enterobacter cloacae. The disclosure also discloses primers for amplifying the target bacteria, which comprises primers which can amplify gene sequence fragments with intra-species homology of more than 95 percent (%) and inter-species homology of less than 75%. The disclosure also provides a method for synthesizing the hybridization probe on the microarray, a method for hybridization reaction and a method for scanning detection.

Abstract: Disclosed are probes, primers, a microarray, a kit and applications for rapid detection of clinical microorganism in ophthalmology, belonging to that technical field of clinical microorganism detection. The probes of that disclosure comprise probes for respectively detect Staphylococcus epidermidis, Staphylococcus aureus, Staphylococcus haemolyticus, Pseudomonas aeruginosa, Staphylococcus hominis, Serratia marcescens, Escherichia coli, Bacillus subtilis and Enterobacter cloacae. The disclosure also discloses primers for amplifying the target bacteria, which comprises primers which can amplify gene sequence fragments with intra-species homology of more than 95 percent (%) and inter-species homology of less than 75%. The disclosure also provides a method for synthesizing the hybridization probe on the microarray, a method for hybridization reaction and a method for scanning detection.

Abstract: A transceiver circuit having a T-coil circuit, inductive termination, and an equalization circuit is disclosed. The transceiver includes a transmitter having an output coupled to a first node, and a receiver having an input coupled to the first node. A T-coil circuit is coupled between the first node and an input/output (I/O) node. The T-coil circuit includes first and second inductors coupled in series between the first node and the I/O node, the inductors being coupled at a second node. A termination circuit is coupled between the first node and a reference node, the termination circuit including a third inductor. The transceiver circuit also includes an equalization circuit configured to convey an equalization signal to the second node.

Abstract: Routing structures including signal routing between die areas is described. In an embodiment, routing structures include signal lines with a characteristic thickness that is greater than a width. The signal lines may be twisted, and run directly underneath pads.

Abstract: Routing structures including signal routing between die areas is described. In an embodiment, routing structures include signal lines with a characteristic thickness that is greater than a width. The signal lines may be twisted, and run directly underneath pads.

Abstract: Routing structures including signal routing between die areas is described. In an embodiment, routing structures include signal lines with a characteristic thickness that is greater than a width. The signal lines may be twisted, and run directly underneath pads.

Abstract: An active component of an integrated voltage regulator (IVR) circuit is deployed within an IC device for regulating an operating voltage thereof. An interposer interconnects the IC device with a power source. A passive inductive component of the IVR circuit is deployed upon a surface of the IC device or the interposer. The inductive component has a magnetic core and a winding (e.g., wire-bond), wound about the magnetic core.

Abstract: A system that includes an integrated circuit die and a power supply decoupling unit is disclosed. The system includes an integrated circuit die, and interconnection region, and a decoupling unit. The integrated circuit die includes a plurality of circuits, which each include multiple devices interconnected using wires fabricated on a first plurality of conductive layers. The interconnection region includes multiple solder balls, and multiple conductive paths, each of which includes wires fabricated on a second plurality conductive layers. At least one solder ball is connected to an Input/Output terminal of a first circuit of the plurality of circuits via one of the conductive paths. The decoupling unit may include a plurality of capacitors and a plurality of terminals. Each terminal of the decoupling unit may be coupled to a respective power terminal of a second circuit of the plurality of circuits via the conductive paths.

Abstract: Systems and methods for stabilizing clock data recovery (CDR) by filtering the abrupt phase shift associated with data pattern transition in the input signal. The CDR circuit includes a data pattern detector coupled to a data pattern filter. The data pattern detector is capable of detecting the data patterns of the input signal. Accordingly, the data pattern filter can selectively generate a filter indication indicating to freeze or suppress the CDR phase caused by data pattern transition. The filter indication can be incorporated to a phase error signal, a gain function, and/or the control voltage driving the VCO.

Abstract: A method for filtering a data signal includes transmitting the data signal from a transmitter to a receiver across a conductor disposed in an interposer, which interconnects the receiver and the transmitter. The data signal is low-passed with a filter, which includes a passive resistive element disposed within the interposer and coupled in series electrically with a passive inductive element. In relation thereto, the interposer is disposed in a position within the interposer, or upon a surface thereof. The filter is coupled to the conductor in a shunt configuration with respect to ground.

Abstract: A method for filtering a data signal includes transmitting the data signal from a transmitter to a receiver across a conductor disposed in an interposer, which interconnects the receiver and the transmitter. The data signal is low-passed with a filter, which includes a passive resistive element disposed within the interposer and coupled in series electrically with a passive inductive element. In relation thereto, the interposer is disposed in a position within the interposer, or upon a surface thereof. The filter is coupled to the conductor in a shunt configuration with respect to ground.

Abstract: An active component of an integrated voltage regulator (IVR) circuit is deployed within an IC device for regulating an operating voltage thereof. An interposer interconnects the IC device with a power source. A passive inductive component of the IVR circuit is deployed upon a surface of the IC device or the interposer. The inductive component has a magnetic core and a winding (e.g., wire-bond), wound about the magnetic core.

Abstract: Systems and methods for stabilizing clock data recovery (CDR) by filtering the abrupt phase shift associated with data pattern transition in the input signal. The CDR circuit includes a data pattern detector coupled to a data pattern filter. The data pattern detector is capable of detecting the data patterns of the input signal. Accordingly, the data pattern filter can selectively generate a filter indication indicating to freeze or suppress the CDR phase caused by data pattern transition. The filter indication can be incorporated to a phase error signal, a gain function, and/or the control voltage driving the VCO.

Abstract: Embodiments of methods, apparatuses, systems and/or devices associated with a bus termination scheme are disclosed.

Abstract: Embodiments of methods, apparatuses, systems and/or devices associated with a bus termination scheme are disclosed.