Abstract: This application provides a method for manufacturing an active array switch, including: forming a gate pattern on a substrate, and then forming a gate insulation layer to cover the gate pattern; forming a semiconductor layer on the gate insulation layer, and forming a first photoresist layer having a plurality of thicknesses on the semiconductor layer, where a thickness of the first photoresist layer above the middle part of the gate pattern is greater than a thicknesses of the first photoresist layer above the two sides of the gate pattern; removing the semiconductor layer, to form a semiconductor pattern; performing a dry etching process on the first photoresist layer; forming a source and a drain on the semiconductor pattern and the gate insulation layer, and removing the entire photoresist layer above the source and the drain and the entire photoresist layer above the middle part of the gate pattern.

Abstract: The present invention relates to a backlight module and manufacturing method thereof. The backlight module comprises: a soft substrate having an outer surface and a flexible substrate; a reflective layer disposed on the outer surface of the soft substrate; a white quantum dot light emitting layer disposed on the soft substrate; an electrode layer disposed on the white quantum dot light emitting layer and covering the soft substrate.

Abstract: This application provides a display panel and a method for manufacturing same. The method for manufacturing a display panel includes: providing an array substrate, disposing an antistatic film on an outer surface of the array substrate, where the antistatic film covers the outer surface of the array substrate; providing a color filter substrate; and laminating the array substrate and the color filter substrate, where the antistatic film is an insulation film or a conductive film, and is disposed on the outer surface of the array substrate by means of a film sheet attachment method, a physical vapor deposition method, or a chemical vapor deposition method.

Abstract: This application provides a method for manufacturing an active array switch, including: forming a gate pattern, gate insulation layer and a semiconductor layer on a substrate; forming a photoresist layer on the semiconductor layer, and removing a part of the semiconductor layer, to form a semiconductor pattern; performing a dry etching process on the photoresist layer, so that only the part of the photoresist layer above the middle part of the gate pattern still covers a part of the semiconductor pattern; changing the part of the semiconductor pattern uncovered by the photoresist layer into a conductor layer by means of a conductor process; and removing the entire photoresist layer above the gate pattern and forming a source and a drain.

Abstract: The embodiments of the present invention disclose a testing apparatus and a testing device. The testing apparatus includes: a platform body; a supporting plate, fixed on an upper surface of the platform body, and configured to support an array substrate, where the supporting plate includes a plurality of metal plates arranged along a first direction, each of the metal plates extends along a second direction, and the first direction is intersected with the second direction; and a conveying apparatus, configured to convey the array substrate. In the present invention, by disposing a whole block of metal plate in the second direction, and arranging the plurality of metal plates along the first direction to form the supporting plate in the testing apparatus, the flatness of the testing apparatus is guaranteed; and during a test, the testing efficiency may be improved, and a risk of electrostatic discharge is reduced.

Abstract: The present application discloses a liquid crystal display panel and a liquid crystal display device adopting such liquid crystal display panel. The liquid crystal display panel includes an array substrate, having an active area and a peripheral area, and including a drive circuit and a pixel array circuit; an opposed substrate, opposite to the array substrate; a liquid crystal layer; a plurality of first spacers, disposed between the array substrate and the opposed substrate, wherein the first spacer are distributed at a first density in the active area; a plurality of second spacers, disposed between the array substrate and the opposed substrate, wherein the plurality of second spacers are distributed at a second density in the peripheral area, the plurality of second spacers are opposite to and spaced from the driving circuit, and the second density is greater than the first density.

Abstract: This application provides a display panel. The display panel includes: an array substrate, having an outer surface; a color-filter substrate, disposed opposite to the array substrate; and an anti-electrostatic thin film, disposed on the outer surface of the array substrate. The anti-electrostatic thin film covers the outer surface of the array substrate.

Abstract: The present application discloses a power circuit, a driving circuit of a display panel, and a display device. A voltage dividing module is connected between the power input end and the input end of a power converter, and a controlled end of the power converter is connected to a first control end of a power chip. An input end of a first switch module is connected to an output end of the power converter, and an output end of the first switch module is connected to an output end of the power. A controlled end of the first switch module is connected to a second control end of the power chip. At this time, the voltage dividing module divides a voltage of the power output by the output end of the power.

Abstract: An array substrate is provided. The array substrate includes a substrate, a light-shielding layer formed on the substrate, a buffer layer formed on the light-shielding layer, a semiconductor layer formed on the buffer layer, a protection layer formed on the semiconductor layer, an insulating layer formed on the protection layer, and an interlayer dielectric layer formed on the protection layer. The substrate includes a source layer, a drain layer and a gate layer disposed thereon. The source layer and the drain layer are formed on the interlayer dielectric layer. The source layer and the drain layer are separately connected to conductor portions on two ends of the semiconductor layer. The insulating layer is disposed between the gate layer and the semiconductor layer. The interlayer dielectric layer is disposed to cover the gate layer and the protection layer. The insulating layer is disposed to cover the semiconductor layer.

Abstract: This application discloses a method for manufacturing an array substrate. The array substrate manufacturing method includes: providing a first substrate; forming gate layers on the first substrate; forming a gate insulation layer on the first substrate, and covering the gate layers; forming an amorphous silicon layer on the gate insulation layer; forming a metal layer on the amorphous silicon layer; forming a photo-sensitive photoresist layer on the metal layer; etching the amorphous silicon layer by using inert gas or nitrogen plasma, to form a groove; forming source layers and a drain layer; removing the photo-sensitive photoresist layer; and forming a passivation layer on the source layers, where a baking process is performed on the photo-sensitive photoresist layer, so that the photo-sensitive photoresist layer flows to some extent so as to form a protection layer, so as to cover the metal layer in a non-active switch channel region.

Abstract: The present application provides a transfer device and a transfer method.

Abstract: The present application discloses a liquid crystal display panel and a liquid crystal display device adopting such liquid crystal display panel. The liquid crystal display panel includes an array substrate, including a drive circuit; an opposed substrate, opposite to the array substrate; a sealant, disposed between the array substrate and the opposed substrate, wherein the sealant, the array substrate and the opposed substrate define a containing space together, and the containing space includes a liquid crystal area and a liquid crystal-free area in parallel; and liquid crystal molecules, distributed in the liquid crystal area, wherein the drive circuit is located in the liquid crystal-free area.

Abstract: The disclosure provides a display substrate, including: a transparent substrate which includes a side surface and an edge; a transparent electrode layer formed on the side surface of the transparent substrate and covering the full side surface; and an alignment layer formed on the transparent electrode layer and covering the full surface of the transparent electrode layer; the alignment layer including a connecting region and a photosensitive region, and the photosensitive region including a photosensitive material. The disclosure also provides a manufacturing method of a display substrate, and a display panel.

Abstract: A liquid crystal display panel and a liquid crystal display device adopting the liquid crystal display panel are provided. The liquid crystal display panel includes: a first substrate having an active area and a peripheral area, a second substrate disposed opposite to the first substrate, a pixel array circuit disposed on the first substrate and located in the active area, a driving circuit disposed on the first substrate and located in the peripheral area, a liquid crystal layer disposed between the first substrate and the second substrate, and a spacing structure disposed on the second substrate and facing towards the driving circuit. The driving circuit is connected to the pixel array circuit and configured to drive the pixel array circuit; the liquid crystal layer includes a number of liquid crystal molecules. The pixel array circuit is configured to control a motion of the liquid crystal molecules.

Abstract: The adjustment method includes: acquiring a first component, a second component, and a third component of each of the pixel units in the pixel area in a first color space; acquiring a tone angle value and a saturation in a second color space according to an average value of the first component, an average value of the second component, and an average value of the third component of the pixel unit in the pixel area; acquiring specified lightness of a blue backlight module and a green backlight module in the backlight module area according to the tone angle value and the saturation; and performing at least one of the following two steps: adjusting lightness of the blue backlight module according to the specified lightness of the blue backlight module; and adjusting lightness of the green backlight module according to the specified lightness of the green backlight module.

Abstract: This application discloses a method for manufacturing an array substrate. The array substrate manufacturing method includes: providing a first substrate; forming gate layers on the first substrate; forming a gate insulation layer on the first substrate, and covering the gate layers; forming an amorphous silicon layer on the gate insulation layer; forming a metal layer on the amorphous silicon layer; forming a photo-sensitive photoresist layer on the metal layer; etching the amorphous silicon layer by using inert gas or nitrogen plasma, to form a groove; forming source layers and a drain layer; removing the photo-sensitive photoresist layer; and forming a passivation layer on the source layers, where a baking process is performed on the photo-sensitive photoresist layer, so that the photo-sensitive photoresist layer flows to some extent so as to form a protection layer, so as to cover the metal layer in a non-active switch channel region.

Abstract: This application relates to an electrostatic discharge (ESD) protection circuit, includes: a first switch, electrically coupled to a first node through a control end, electrically coupled to a ground node through a first end, and electrically coupled to a signal input node through a second end; a capacitor electrically coupled between the first node and the signal input node; a second switch, electrically coupled to a low level line through a control end and a first end, and electrically coupled to the signal input node through a second end; and a third switch, electrically coupled to a high level line through a control end, and electrically coupled to the first node through a first end, being electrically coupled to the low level line through a second end.

Abstract: The present application discloses a picture storage method and a display panel. The picture storage method includes inputting a current frame picture into a gray scale judging module; judging a gray scale value of the current frame picture, and outputting the current frame picture to a corresponding data compression module; compressing the current frame picture by the data compression module according to a corresponding data compression ratio parameter; and sending the compressed current frame picture to a memory for storage.

Abstract: The present invention discloses a display panel and a manufacturing method comprising a first substrate, a second substrate disposed parallel to the first substrate, a liquid crystal layer disposed on the first substrate and the second substrate, a switch unit formed on the second substrate, a color filter layer formed on the switch unit and a flattening layer disposed on the color filter layer; wherein the flat layer comprises a quantum dot material.

Abstract: A repair method of a display panel comprises: disposing a repair line on a non-display area; dividing the repair line into a first, a second, and a third segments sequentially connected; electrically connecting the first end of the target data line to an input end of the gate driving chip through the first segment; dividing the second segment of the repair line into a first and second parts, wherein the second part electrically connects the operational amplifiers (OPAs) of the gate driving chip for amplifying the repair signal transmitted through the repair line, and the first part electrically connects two gate driving chips; electrically connecting the last output end of the gate driving chip to the second end of the target data line through the third segment, for transmitting the repair signal amplified by the (OPA) to the breakpoint through the second end of the target data line.