Patents by Inventor Huain-Jelin Lin

Huain-Jelin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6864174
    Abstract: A method for compensating for CD variations across a semiconductor process wafer surface in a plasma etching process including providing a semiconductor wafer having a process surface including photolithographically developed features imaged from a photomask; determining a first dimensional variation of the features with respect to corresponding photomask dimensions along at least one wafer surface direction to determine a first levelness of the process surface; determining gas flow parameters in a plasma reactor for a plasma etching process required to approach a level process surface by reference to an archive of previous plasma etching process parameters carried out in the plasma reactor; carrying out the plasma etching process in the plasma rector according to the determined gas flow parameters; and, determining a second dimensional variation of the features along the at least one wafer surface direction to determine a second levelness of the process surface.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: March 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Li-Te S. Lin, Yui Wang, Ming-Ching Chang, Li-Shung Chen, Huain-Jelin Lin, Yuan-Hong Chin, Hong-Yuan Tao
  • Publication number: 20040185584
    Abstract: A method for compensating for CD variations across a semiconductor process wafer surface in a plasma etching process including providing a semiconductor wafer having a process surface including photolithographically developed features imaged from a photomask; determining a first dimensional variation of the features with respect to corresponding photomask dimensions along at least one wafer surface direction to determine a first levelness of the process surface; determining gas flow parameters in a plasma reactor for a plasma etching process required to approach a level process surface by reference to an archive of previous plasma etching process parameters carried out in the plasma reactor; carrying out the plasma etching process in the plasma rector according to the determined gas flow parameters; and, determining a second dimensional variation of the features along the at least one wafer surface direction to determine a second levelness of the process surface.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Te S. Lin, Yui Wang, Ming-Ching Chang, Li-Shung Chen, Huain-Jelin Lin, Yuan-Hung Chiu, Hun-Jan Tao