Patents by Inventor Huan-Chieh CHEN

Huan-Chieh CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151900
    Abstract: A method for manufacturing a semiconductor device includes: forming a first waveguide structure and a second waveguide structure on a substrate in which the first waveguide structure and the second waveguide structure is spaced apart from each other by a recess; conformally forming an un-doped dielectric layer to cover the first and second waveguide structures and to form a gap between two corresponding portions of the un-doped dielectric layer laterally covering the first waveguide structure and the second waveguide structure, respectively; and forming a doped filling layer to fill the gap.
    Type: Application
    Filed: February 22, 2023
    Publication date: May 9, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Li LO, Huan-Chieh CHEN, Yao-Wen CHANG, Chih-Ming CHEN
  • Patent number: 11978773
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a base structure. The semiconductor device structure also includes a first epitaxial structure and a second epitaxial structure sandwiching the channel structures. The semiconductor device structure further includes a gate stack wrapped around each of the channel structures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. In addition, the semiconductor device structure includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Shih-Chuan Chiu, Cheng-Chi Chuang, Chih-Hao Wang
  • Publication number: 20240120391
    Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The structure includes a first source/drain region disposed under a well portion, a second source/drain region disposed adjacent the first source/drain region, a dielectric material disposed between the first and second source/drain regions, and a conductive contact having a first portion disposed under the first source/drain region and a second portion disposed adjacent the first source/drain region. The second portion is disposed in the dielectric material. The structure further includes a conductive feature disposed in the dielectric material, and the conductive feature is electrically connected to the conductive contact. The conductive feature has a top surface that is substantially coplanar with a top surface of the well portion.
    Type: Application
    Filed: January 19, 2023
    Publication date: April 11, 2024
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Chih-Hao WANG
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Patent number: 11942530
    Abstract: The present disclosure relates to a semiconductor device having a backside source/drain contact, and method for forming the device. The semiconductor device includes a source/drain feature having a top surface and a bottom surface, a first silicide layer formed in contact with the top surface of the source/drain feature, a first conductive feature formed on the first silicide layer, and a second conductive feature having a body portion and a first sidewall portion extending from the body portion, wherein the body portion is below the bottom surface of the source/drain feature, and the first sidewall portion is in contact with the first conductive feature.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Yuan Chen, Pei-Yu Wang, Huan-Chieh Su, Chih-Hao Wang
  • Publication number: 20240096701
    Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.
    Type: Application
    Filed: May 17, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Ching-Wei TSAI, Shang-Wen CHANG, Yi-Hsun CHIU, Chih-Hao WANG
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20240084450
    Abstract: A shower head structure and a plasma processing apparatus are provided. The shower head structure includes a plate body with a first zone and a second zone on a first surface. A plurality of first through holes are in the first zone, each of the first through holes having a diameter uniform with others of the first through holes. A plurality of second through holes are in the second zone. The first zone is in connection with the second zone, and the diameter of each of the first through holes is greater than a diameter of each of the second through holes. A plasma processing apparatus includes the shower head structure is also provided.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: HUAN-CHIEH CHEN, JHIH-REN LIN, TAI-PIN LIU, SHYUE-SHIN TSAI, KEITH KUANG-KUO KOAI
  • Patent number: 11859284
    Abstract: A shower head structure and a plasma processing apparatus are provided. The shower head structure includes a plate body with a first zone and a second zone on a first surface. A plurality of first through holes are in the first zone, each of the first through holes having a diameter uniform with others of the first through holes. A plurality of second through holes are in the second zone. The first zone is in connection with the second zone, and the diameter of each of the first through holes is greater than a diameter of each of the second through holes. A plasma processing apparatus includes the shower head structure is also provided.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Huan-Chieh Chen, Jhih-Ren Lin, Tai-Pin Liu, Shyue-Shin Tsai, Keith Kuang-Kuo Koai
  • Publication number: 20230403956
    Abstract: Various embodiments of the present disclosure provide a memory device and methods of forming the same. In one embodiment, a memory device is provided. The memory device includes a substrate, a bottom electrode disposed over the substrate, a top electrode disposed over the bottom electrode, and a phase change layer disposed between the top electrode and the bottom electrode. The phase change layer is a laminated structure comprising a first layer of phase change material and a second layer of phase change material alternatingly stacked, and the first layer of phase change material is chemically different from the second layer of phase change material, wherein the first layer of phase change material has a first thickness that is less than a second thickness of the second layer of phase change material.
    Type: Application
    Filed: June 11, 2022
    Publication date: December 14, 2023
    Inventors: Chin I WANG, Huan-Chieh CHEN, Chia-Wen ZHONG, Yao-Wen CHANG
  • Publication number: 20230270024
    Abstract: The present disclosure is directed towards an integrated chip including a first memory cell overlying a substrate. The first memory cell comprises a first data storage layer. A second memory cell is adjacent to the first memory cell. A dielectric layer is disposed laterally between the first memory cell and the second memory cell. An air gap is disposed within the dielectric layer. The air gap is spaced laterally between the first memory cell and the second memory cell.
    Type: Application
    Filed: February 22, 2022
    Publication date: August 24, 2023
    Inventors: Ching Ju Yang, Huan-Chieh Chen, Yao-Wen Chang
  • Patent number: 11214868
    Abstract: The present disclosure provides a blocker plate, including a plate body having a plurality of through holes, a first zone from a center to a first radius of the plate body, having a first conductance, a second zone from the first radius to a second radius of the plate body, having a second conductance, a third zone from the second radius to a third radius of the plate body, having a third conductance, wherein the first radius is smaller than the second radius, the second radius is smaller than the third radius, and the second conductance is greater than the first conductance. A chemical vapor deposition (CVD) apparatus including the blocker plate is also disclosed.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: January 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Huan-Chieh Chen, Chao-Chun Wang, Chih-Yu Wu, Keith Kuang-Kuo Koai
  • Publication number: 20210054506
    Abstract: A shower head structure and a plasma processing apparatus are provided. The shower head structure includes a plate body with a first zone and a second zone on a first surface. A plurality of first through holes are in the first zone, each of the first through holes having a diameter uniform with others of the first through holes. A plurality of second through holes are in the second zone. The first zone is in connection with the second zone, and the diameter of each of the first through holes is greater than a diameter of each of the second through holes. A plasma processing apparatus includes the shower head structure is also provided.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 25, 2021
    Inventors: HUAN-CHIEH CHEN, JHIH-REN LIN, TAI-PIN LIU, SHYUE-SHIN TSAI, KEITH KUANG-KUO KOAI
  • Publication number: 20200131640
    Abstract: The present disclosure provides a blocker plate, including a plate body having a plurality of through holes, a first zone from a center to a first radius of the plate body, having a first conductance, a second zone from the first radius to a second radius of the plate body, having a second conductance, a third zone from the second radius to a third radius of the plate body, having a third conductance, wherein the first radius is smaller than the second radius, the second radius is smaller than the third radius, and the second conductance is greater than the first conductance. A chemical vapor deposition (CVD) apparatus including the blocker plate is also disclosed.
    Type: Application
    Filed: June 27, 2019
    Publication date: April 30, 2020
    Inventors: HUAN-CHIEH CHEN, CHAO-CHUN WANG, CHIH-YU WU, KEITH KUANG-KUO KOAI
  • Patent number: 10626499
    Abstract: A deposition device structure is provided. The deposition device structure includes a heater in a chamber. The deposition device structure also includes a shower head over the heater. The shower head includes holes extending from a top surface of the shower head to a bottom surface of the shower head. The bottom surface of the shower head faces the heater. The bottom surface of the shower head has a first section and a second section. The second section of the bottom surface is rougher than the first section of the bottom surface.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: April 21, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Chan Lo, Huan-Chieh Chen, Yi-Fang Lai, Keith Kuang-Kuo Koai, Chin-Feng Sun, Po-Hsiung Leu, Ding-I Liu, Kai-Shiung Hsu
  • Publication number: 20190032215
    Abstract: A deposition device structure is provided. The deposition device structure includes a heater in a chamber. The deposition device structure also includes a shower head over the heater. The shower head includes holes extending from a top surface of the shower head to a bottom surface of the shower head. The bottom surface of the shower head faces the heater. The bottom surface of the shower head has a first section and a second section. The second section of the bottom surface is rougher than the first section of the bottom surface.
    Type: Application
    Filed: October 5, 2017
    Publication date: January 31, 2019
    Inventors: Yen-Chan LO, Huan-Chieh CHEN, Yi-Fang LAI, Keith Kuang-Kuo KOAI, Chin-Feng SUN, Po-Hsiung LEU, Ding-I LIU, Kai-Shiung HSU