Patents by Inventor Huan Dou

Huan Dou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11889096
    Abstract: Techniques related to accelerated video enhancement using deep learning selectively applied based on video codec information are discussed. Such techniques include applying a deep learning video enhancement network selectively to decoded non-skip blocks that are in low quantization parameter frames, bypassing the deep learning network for decoded skip blocks in low quantization parameter frames, and applying non-deep learning video enhancement to high quantization parameter frames.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: January 30, 2024
    Assignee: Intel Corporation
    Inventors: Chen Wang, Ximin Zhang, Huan Dou, Yi-Jen Chiu, Sang-Hee Lee
  • Publication number: 20230054523
    Abstract: An example apparatus for enhancing video includes a decoder to decode a received 360-degree projection format video bitstream to generate a decoded 360-degree projection format video. The apparatus also includes a viewport generator to generate a viewport from the decoded 360-degree projection format video. The apparatus further includes a convolutional neural network (CNN)-based filter to remove an artifact from the viewport to generate an enhanced image. The apparatus further includes a displayer to send the enhanced image to a display.
    Type: Application
    Filed: February 17, 2020
    Publication date: February 23, 2023
    Inventors: Huan Dou, Lidong Xu, Xiaoxia Cai, Chen Wang, Yi-Jen Chiu
  • Publication number: 20230052483
    Abstract: An apparatus for super resolution imaging includes a convolutional neural network (104) to receive a low resolution frame (102) and generate a high resolution illuminance component frame. The apparatus also includes a hardware scaler (106) to receive the low resolution frame (102) and generate a second high resolution chrominance component frame. The apparatus further includes a combiner (108) to combine the high resolution illuminance component frame and the high resolution chrominance component frame to generate a high resolution frame (110).
    Type: Application
    Filed: February 17, 2020
    Publication date: February 16, 2023
    Inventors: Xiaoxia Cai, Chen Wang, Huan Dou, Yi-Jen Chiu, Lidong Xu
  • Publication number: 20220351496
    Abstract: A method for image content classification is described herein. The method includes counting a number of distinct color numbers in an image. The method also includes clustering blocks with a same distinct color number into a same class and determining a block occupancy rate of each color number for the image. Finally, the method includes classifying the image according to the block occupancy rate via a plurality of classifiers communicatively coupled in series.
    Type: Application
    Filed: December 24, 2019
    Publication date: November 3, 2022
    Inventors: Huan DOU, Lidong XU, Xiaoxia CAI, Chen WANG, Yi-Jen CHIU
  • Publication number: 20200327702
    Abstract: Techniques related to accelerated video enhancement using deep learning selectively applied based on video codec information are discussed. Such techniques include applying a deep learning video enhancement network selectively to decoded non-skip blocks that are in low quantization parameter frames, bypassing the deep learning network for decoded skip blocks in low quantization parameter frames, and applying non-deep learning video enhancement to high quantization parameter frames.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Applicant: INTEL CORPORATION
    Inventors: Chen Wang, Ximin Zhang, Huan Dou, Yi-Jen Chiu, Sang-Hee Lee
  • Patent number: 9609361
    Abstract: The present disclosure relates to the technical field of video coding. Implementations herein provide methods for fast 3D video coding for high efficiency video coding HEVC. The methods speed up the view synthesis process during the rate distortion optimization for depth coding based on texture flatness. The implementations include extracting coding information from textures, analyzing luminance regularity among pixels from flat texture regions based on statistical method, judging the flat texture regions using the luminance regularity for depth maps and terminating the flat texture block's view synthesis process when processing rate distortion optimization. Compared to original pixel-by-pixel rendering methods, the implementations reduce coding time without causing significant performance loss.
    Type: Grant
    Filed: December 6, 2014
    Date of Patent: March 28, 2017
    Assignee: Beijing University of Technology
    Inventors: Kebin Jia, Huan Dou
  • Publication number: 20160353129
    Abstract: The present disclosure relates to the technical field of video coding. Implementations herein provide methods for fast 3D video coding for high efficiency video coding HEVC. The methods speed up the view synthesis process during the rate distortion optimization for depth coding based on texture flatness. The implementations include extracting coding information from textures, analyzing luminance regularity among pixels from flat texture regions based on statistical method, judging the flat texture regions using the luminance regularity for depth maps and terminating the flat texture block's view synthesis process when processing rate distortion optimization. Compared to original pixel-by-pixel rendering methods, the implementations reduce coding time without causing significant performance loss.
    Type: Application
    Filed: December 6, 2014
    Publication date: December 1, 2016
    Inventors: Kebin Jia, Huan Dou