Abstract: A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.

Abstract: A writing method of a resistive memory storage apparatus includes: applying one of a set voltage and a reset voltage serving as a first selected voltage to a memory cell and obtaining a first read current; applying a disturbance voltage to the memory cell and obtaining a second read current; and determining whether a relationship between the first and second read currents satisfies a preset relationship, and if not, applying the other of the set voltage and the reset voltage serving as a second selected voltage to the memory cell and applying the first selected voltage to the memory cell again. A polarity of the disturbance voltage is different from that of the first selected voltage, and the absolute value of the disturbance voltage is less than that of the second selected voltage. A resistive memory storage apparatus is also provided.

Abstract: A writing method of a resistive memory storage apparatus includes: applying one of a set voltage and a reset voltage serving as a first selected voltage to a memory cell and obtaining a first read current of the memory cell; applying a disturbance voltage to the memory cell and obtaining a second read current of the memory cell; and determining whether a relationship between the first and second read currents satisfies a preset relationship, and if not, applying the other of the set voltage and the reset voltage serving as a second selected voltage to the memory cell and applying the first selected voltage to the memory cell again. A polarity of the disturbance voltage is different from that of the second selected voltage, and the absolute value of the disturbance voltage is less than that of the second selected voltage. A resistive memory storage apparatus is also provided.