Abstract: The present disclosure provides a gate drive circuit, an array substrate, and a display device. The gate drive circuit includes cascaded shift registers, control circuits, level shifters, voltage stabilization circuits, and first exchanging circuits. The shift registers at respective stages output respective first signals. Each control circuit is configured to process the respective first signal to generate a respective second signal. Each level shifter is configured to convert the voltage level of the respective second signal to generate a respective third signal. Each voltage stabilization circuit is configured to stabilize the respective third signal. The stabilized third signal is outputted as a fourth signal. The first exchanging circuit is configured to enable any of the following: exchanging the first signals at two adjacent stages, exchanging the second signals at two adjacent stages, exchanging the third signals at two adjacent stages, and exchanging the fourth signals at two adjacent stages.

Abstract: A multi-bit flip-flop includes a first flip-flop, a second flip-flop, a first inverter, and a second inverter. The first flip-flop has a first driving capability. The second flip-flop has a second driving capability different from the first driving capability. The first inverter is configured to receive a first clock signal on a first clock pin, and is configured to generate a second clock signal inverted from the first clock signal. The second inverter is coupled to the first inverter, is configured to receive the second clock signal, and is configured to generate a third clock signal inverted from the second clock signal. The first flip-flop and the second flip-flop are configured to share at least the first clock pin.

Abstract: A user equipment includes a receiving unit that executes sensing for a part of candidate resources to be used for transmission of inter-terminal direct communication, a control unit that determines a resource to be used for transmission based on a result of the sensing, and a transmitting unit that transmits a message to another units of user equipment using the determined resource.

Abstract: An integrated circuit layout is provided. The integrated circuit layout includes one or more first cell rows partially extending across a space arranged for an integrated circuit layout along a first direction. Each of the one or more first cell rows has a first height along a second direction perpendicular to the first direction. The integrated circuit layout includes one or more third cell rows partially extending across the space along the first direction. Each of the one or more third cell rows has a second height along the second direction, the second height different from the first height.

Abstract: A user apparatus has a request unit configured to transmit a scheduling request to a base station apparatus, an acquisition unit configured to receive information indicative of a resource pool based on the scheduling request from the base station apparatus, and a communication unit configured to perform sidelink transmission to another user apparatus using the resource pool.

Abstract: Methods, systems, and apparatuses provide a transmitter architecture that directly generates 4N-QAM constellation using a raw bit stream as input and that does not require a digital-to-analog converter (DAC) in the signal path.

Abstract: Novel iron chelating group conjugated penam derivatives described herein show antibacterial activity, and could be used as antibacterial agents or beta-lactamase inhibitors (BLIs) which are of value for application in combination with other antibacterial agents.

Abstract: Millimeter wave communications system include an RF printed circuit board structure that includes a phased array antenna that has a plurality of radiating elements and a channel block that includes a plurality of active antenna channels that each feed a respective one of a plurality of sub-groups of the radiating elements. A first sub-set of the active antenna channels are completely positioned on a first side of the phased array antenna and a second sub-set of the active antenna channels each include a first portion that is on a second side of the phased array antenna, the second side being adjacent the first side.

Abstract: A method of forming an integrated device includes: providing a first via pillar file specifying a first via pillar; providing a second via pillar file specifying a second via pillar; arranging, by a processor, the first via pillar to electrically connect to a circuit cell in a first circuit; arranging an interconnecting path for electrical connection of the first via pillar to another circuit cell in the first circuit; arranging, by the processor, the second via pillar to replace the first via pillar when the first via pillar induces an electromigration (EM) phenomenon; re-routing the interconnecting path with replacement of the first via pillar to generate a second circuit when the first via pillar induces the EM phenomenon; and generating the integrated device according to the second circuit.

Abstract: A user equipment in a radio communication system, includes a configuration information managing unit configured to hold mapping information indicating mapping between capability information and a resource in sidelink; and a signal transmitting unit configured to report capability information of the user equipment, by transmitting a report signal by using a resource corresponding to the capability information of the user equipment in the sidelink, based on the mapping information.

Abstract: A communication device includes a transmitter that transmits data; and a controller that generates, in response to a predetermined trigger, a request signal including information on a time and frequency location of a radio resource to be used by the transmitter.

Abstract: A user equipment includes a measuring unit that executes sensing of a resource set with which signals from one or more other units of user equipment are transmitted; a control unit that determines, based on a measurement result of the resource set by the sensing, whether to operate as a first device that allocates a resource in the resource set associated with a cluster or to operate as a second device to which a resource is allocated by the first device in the cluster formed of a plurality of units of user equipment; and a communication unit that executes communication with the one or more other units of user equipment.

Abstract: A large-scale photovoltaic direct current (DC) series boost grid-connected system with a power balancer, including N photovoltaic DC converters and N?1 power balancers, wherein N?2. The output ends of the photovoltaic DC converters are connected successively in series and then connected to the DC grid, and the input ends of the photovoltaic DC converters are respectively connected to the output ends of the photovoltaic power generation unit. Among the photovoltaic DC converters, which are arranged successively in series, a power balancer is disposed between the input ends of two photovoltaic DC converters adjacent to each other. The N?1 power balancers are arranged corresponding to the set N?1 photovoltaic DC converters respectively to balance the input power of the corresponding photovoltaic DC converter, thereby eliminating a difference between the output voltages of the photovoltaic DC converters.

Abstract: The present disclosure provides a DC power supply system and its control method. The system includes: a first power supply circuit and a second power supply circuit, at least one of the first power supply circuit and the second power supply circuit including a phase shifting transformer, wherein the first power supply circuit includes a number N of first AC/DC conversion circuits, and the second power supply circuit includes a number N of second AC/DC conversion circuits, where N is an integer greater than or equal to 2; an output side of each of the N first AC/DC conversion circuits is electrically connected in parallel with an output side of a corresponding second AC/DC conversion circuit of the N second AC/DC conversion circuits through a DC busbar to form N sets of redundant backup circuits.

Abstract: A large-scale photovoltaic direct current (DC) series boost grid-connected system with a power balancer, including N photovoltaic DC converters and N?1 power balancers, wherein N?2. The output ends of the photovoltaic DC converters are connected successively in series and then connected to the DC grid, and the input ends of the photovoltaic DC converters are respectively connected to the output ends of the photovoltaic power generation unit. Among the photovoltaic DC converters, which are arranged successively in series, a power balancer is disposed between the input ends of two photovoltaic DC converters adjacent to each other. The N?1 power balancers are arranged corresponding to the set N?1 photovoltaic DC converters respectively to balance the input power of the corresponding photovoltaic DC converter, thereby eliminating a difference between the output voltages of the photovoltaic DC converters.

Abstract: An integrated circuit includes a first bit flip-flop and a second flip-flop. The first flip-flop has a first driving capability. The second flip-flop has a second driving capability different from the first driving capability. The first flip-flop and the second flip-flop are part of a multibit flip-flop configured to share at least a first clock pin. The first clock pin is configured to receive the first clock signal.

Abstract: A method of cleaning a contact hole of a semiconductor device, can include: removing a first portion of an object to be removed in the contact hole by a dry cleaning process, where a second portion of the object to be removed remains after the dry cleaning process has completed; and removing the second portion of the object to be removed by a wet cleaning process. The method can further include: forming an interlayer dielectric layer on a semiconductor substrate having a contact region; etching the interlayer dielectric layer to form the contact hole, where the contact hole penetrates the interlayer dielectric layer and exposes the contact region; and after the cleaning of the contact hole, filling the contact hole by a metal material to form a metal plug that is in contact with the contact region.

Abstract: The present disclosure provides a method for touch-region calibration. The method includes controlling a switch of a camera assembly in an electronic device to turn off an infrared filtering function of an infrared filter of the camera assembly, according to a calibration instruction; detecting a plurality of calibrated objects using the camera assembly; and determining a range of a touch region on the electronic device according to the plurality of calibrated objects.

Abstract: A logic cell structure includes a first portion, a second portion and a third portion. The first portion, arranged to be a first layout of a first semiconductor element, is placed in a first cell row of a substrate area extending in a first direction. The second portion, arranged to be a second layout of a second semiconductor element, is placed in a second cell row of the substrate area. The third portion is arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element. The first, second and third portions are bounded by a bounding box with a height in a second direction and a width in the first direction. Respective centers of the first portion and the second portion are arranged in a third direction different from each of the first direction and the second direction.

Abstract: Novel iron chelating group conjugated penam derivatives described herein show antibacterial activity, and could be used as antibacterial agents or beta-lactamase inhibitors (BLIs) which are of value for application in combination with other antibacterial agents.