Patents by Inventor Huan-Yu CHIEN
Huan-Yu CHIEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11349045Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.Type: GrantFiled: July 22, 2020Date of Patent: May 31, 2022Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Ray-Hua Horng, Ken-Yen Chen, Huan-Yu Chien
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Publication number: 20200350463Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.Type: ApplicationFiled: July 22, 2020Publication date: November 5, 2020Applicant: NATIONAL CHIAO TUNG UNIVERSITYInventors: Ray-Hua HORNG, Ken-Yen CHEN, Huan-Yu CHIEN
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Patent number: 10770617Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.Type: GrantFiled: January 25, 2018Date of Patent: September 8, 2020Assignee: National Chiao Tung UniversityInventors: Ray-Hua Horng, Ken-Yen Chen, Huan-Yu Chien
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Patent number: 10553640Abstract: An electrodeless LED display and a method for fabricating the same are disclosed. In the method, an epitaxial layer is provided and a transparent conduction layer is formed on the epitaxial layer to bond a substrate. The epitaxial layer is etched to form dies deposition metal films on the transparent conduction layer. Conduction channels are formed on the substrate, and two ends of each conduction channel are respectively provided two conduction metal blocks. First metal members are formed on the metal film formed on the dies and the conduction metal blocks to connect with the dies on the different conduction channels. Then, second metal members are formed on the first metal members formed on the conduction metal blocks, whereby the second metal members and the first metal members formed on the dies are located on an identical plane.Type: GrantFiled: February 14, 2018Date of Patent: February 4, 2020Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Ray-Hua Horng, Huan-Yu Chien, Ken-Yen Chen
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Patent number: 10535708Abstract: An electrodeless LED display and a method for fabricating the same are disclosed. In the method, an epitaxial layer is provided and a transparent conduction layer is formed on the epitaxial layer to bond a substrate. The epitaxial layer is etched to form dies deposition metal films on the transparent conduction layer. Conduction channels are formed on the substrate, and two ends of each conduction channel are respectively provided two conduction metal blocks. First metal members are formed on the metal film formed on the dies and the conduction metal blocks to connect with the dies on the different conduction channels. Then, second metal members are formed on the first metal members formed on the conduction metal blocks, whereby the second metal members and the first metal members formed on the dies are located on an identical plane.Type: GrantFiled: July 19, 2017Date of Patent: January 14, 2020Assignee: National Chiao Tung UniversityInventors: Ray-Hua Horng, Huan-Yu Chien, Ken-Yen Chen
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Publication number: 20190051790Abstract: A light emitting diode device with flip-chip structure includes a transparent protective substrate, a transparent conductor layer, a glue layer, a group III-V stack layer, a first conductivity metal electrode, a second conductivity metal electrode and an insulating layer. The transparent conductor layer is formed on the transparent protective substrate. The glue layer bonds the transparent protective substrate and the transparent conductor layer. The group III-V stack layer and the first conductivity metal electrode are respectively formed on a first portion and a second portion of the transparent conductor layer. The second conductivity metal electrode is formed on a portion of the group III-V stack layer. The insulating layer covers exposed portions of the transparent conductor layer and the group III-V stack layer, and the insulating layer further covers portions of the first and second conductivity metal electrodes, so as to expose the first and second conductivity metal electrodes.Type: ApplicationFiled: January 25, 2018Publication date: February 14, 2019Inventors: RAY-HUA HORNG, RAY-HUA HORNG, HUAN-YU CHIEN
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Publication number: 20180323235Abstract: An electrodeless LED display and a method for fabricating the same are disclosed. In the method, an epitaxial layer is provided and a transparent conduction layer is formed on the epitaxial layer to bond a substrate. The epitaxial layer is etched to form dies deposition metal films on the transparent conduction layer. Conduction channels are formed on the substrate, and two ends of each conduction channel are respectively provided two conduction metal blocks. First metal members are formed on the metal film formed on the dies and the conduction metal blocks to connect with the dies on the different conduction channels. Then, second metal members are formed on the first metal members formed on the conduction metal blocks, whereby the second metal members and the first metal members formed on the dies are located on an identical plane.Type: ApplicationFiled: February 14, 2018Publication date: November 8, 2018Inventors: Ray-Hua HORNG, Huan-Yu CHIEN, Ken-Yen CHEN
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Publication number: 20180323234Abstract: An electrodeless LED display and a method for fabricating the same are disclosed. In the method, an epitaxial layer is provided and a transparent conduction layer is formed on the epitaxial layer to bond a substrate. The epitaxial layer is etched to form dies deposition metal films on the transparent conduction layer. Conduction channels are formed on the substrate, and two ends of each conduction channel are respectively provided two conduction metal blocks. First metal members are formed on the metal film formed on the dies and the conduction metal blocks to connect with the dies on the different conduction channels. Then, second metal members are formed on the first metal members formed on the conduction metal blocks, whereby the second metal members and the first metal members formed on the dies are located on an identical plane.Type: ApplicationFiled: July 19, 2017Publication date: November 8, 2018Inventors: Ray-Hua HORNG, Huan-Yu CHIEN, Ken-Yen CHEN
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Patent number: 9263281Abstract: A method for manufacturing a contact plug is provided. The method includes providing a silicon substrate having at least one opening. A titanium layer is conformably formed in the opening. A first barrier layer is conformably formed on the titanium layer in the opening. A rapid thermal process is performed on the titanium layer and the first barrier layer. After performing the rapid thermal process, a second barrier layer is conformably formed on the first barrier layer in the opening.Type: GrantFiled: August 30, 2013Date of Patent: February 16, 2016Assignee: Vanguard International Semiconductor CorporationInventors: Yi-Tsung Jan, Peng-Fei Wu, Chih-Ming Kao, You-Cheng Liau, Wen-Jen Chuang, Rong-Gen Wu, Huan-Yu Chien, Ting-Yu Kuo, Su-Chen Lin
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Publication number: 20150061082Abstract: A method for manufacturing a contact plug is provided. The method includes providing a silicon substrate having at least one opening. A titanium layer is conformably formed in the opening. A first barrier layer is conformably formed on the titanium layer in the opening. A rapid thermal process is performed on the titanium layer and the first barrier layer. After performing the rapid thermal process, a second barrier layer is conformably formed on the first barrier layer in the opening.Type: ApplicationFiled: August 30, 2013Publication date: March 5, 2015Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Yi-Tsung JAN, Peng-Fei WU, Chih-Ming KAO, You-Cheng LIAU, Wen-Jen CHUANG, Rong-Gen WU, Huan-Yu CHIEN, Ting-Yu KUO, Su-Chen LIN