Patents by Inventor Huang-Choung Chang

Huang-Choung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100310828
    Abstract: [Object]To provide a substrate processing method capable of forming a concavo-convex structure on a substrate surface while reducing the number of processes. [Solving Means] In a substrate processing method according to the present invention, particles are dispersed on a surface of a substrate, and a concavo-convex structure is formed on the surface of the substrate by etching the surface of the substrate with the particles as a mask and the mask is simultaneously removed by the etching. According to this method, a process of removing the mask from the substrate surface after the concavo-convex structure is formed becomes unnecessary. Accordingly, since the number of processes necessary to form the concavo-convex structure on the substrate surface is largely reduced, it becomes possible to greatly improve productivity.
    Type: Application
    Filed: November 13, 2008
    Publication date: December 9, 2010
    Applicant: ULVAC, INC.
    Inventors: Susumu Sakio, Hideo Takei, Kazuya Saito, Kazuhiro Watanabe, Shinsuke Iguchi, Hiroyuki Yamakawa, Kyuzou Nakamura, Yu-hsin Lin, Huang-choung Chang, Tung-jung Wu
  • Patent number: 7847410
    Abstract: An interconnect of the group III-V semiconductor device and the fabrication method for making the same are described. The interconnect includes a first adhesion layer, a diffusion barrier layer for preventing the copper from diffusing, a second adhesion layer and a copper wire line. Because a stacked-layer structure of the first adhesion layer/diffusion barrier layer/second adhesion layer is located between the copper wire line and the group III-V semiconductor device, the adhesion between the diffusion barrier layer and other materials is improved. Therefore, the yield of the device is increased.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: December 7, 2010
    Assignee: National Chiao Tung University
    Inventors: Cheng-Shih Lee, Edward Yi Chang, Huang-Choung Chang
  • Publication number: 20070040274
    Abstract: An interconnect of the group III-V semiconductor device and the fabrication method for making the same are described. The interconnect includes a first adhesion layer, a diffusion barrier layer for preventing the copper from diffusing, a second adhesion layer and a copper wire line. Because a stacked-layer structure of the first adhesion layer/diffusion barrier layer/second adhesion layer is located between the copper wire line and the group III-V semiconductor device, the adhesion between the diffusion barrier layer and other materials is improved. Therefore, the yield of the device is increased.
    Type: Application
    Filed: November 22, 2005
    Publication date: February 22, 2007
    Inventors: Cheng-Shih Lee, Edward Yi Chang, Huang-Choung Chang