Abstract: A respiration detection device includes a mouth guard mounted in a mouth of a user. A coupling seat is mounted to a front end of the mouth guard and is located in a position in front of a nose and the mouth of the user. A detection unit includes a circuit board, a microphone, a micro-processing circuit, and a transmission circuit. The circuit board is mounted to the coupling seat and is connected to a battery. The micro-processing circuit, the transmission circuit, and the microphone are mounted on the circuit board. The micro-processing circuit is configured to receive and process a message from the microphone to indicate a respiratory rate of the user. The transmission circuit is electrically connected to the micro-processing circuit and is configured to proceed with data transmission with an external device. The respiration detection device can accurately detect the respiratory rate in real time.

Abstract: A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.

Abstract: A top-gate transistor array substrate includes a transparent substrate with a plane, an ion release layer, a pixel array, and a first insulating layer. The ion release layer is disposed on the transparent substrate and completely covers the plane. The pixel array is disposed on the ion release layer and includes a plurality of transistors and a plurality of pixel electrodes. Each of the transistors includes a source, a drain, a gate and a MOS (metal oxide semiconductor) layer. The drain, the source and the MOS layer are disposed on the ion release layer. The pixel electrodes are electrically connected to the drains respectively. The gate is disposed above the MOS layer. The first insulating layer is disposed between the MOS layers and the gates. The MOS layer contacts the ion release layer. The ion release layer can release a plurality of ions into the MOS layers.

Abstract: A manufacturing method of a thin film transistor is provided. An insulating pattern layer having at least one protrusion is formed on a substrate. At least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. The spacer and the amorphous semiconductor patterns are crystallized. The protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. A carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract: A manufacturing method of a thin film transistor is provided. An insulating pattern layer having at least one protrusion is formed on a substrate. At least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. The spacer and the amorphous semiconductor patterns are crystallized. The protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. A carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract: A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract: A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.

Abstract: A thin film transistor and a manufacturing method thereof are provided. A bottom gate, a gate insulating layer and an amorphous semiconductor layer are formed on a substrate. The amorphous semiconductor layer has an uneven upper surface. A laser annealing process is performed on the amorphous semiconductor layer through the uneven upper layer to transform the amorphous semiconductor layer into a polycrystalline semiconductor layer having a smaller-crystallizing-section and a greater-crystallizing-section. Another gate insulating layer, an upper gate and patterned photoresist layer are formed on the polycrystalline semiconductor layer. Patterns of the upper gate and the bottom gate are defined by the same photo-mask. A source/drain is formed in the polycrystalline semiconductor layer. An etching process with etching selectivity is performed on the upper gate and the patterned photoresist layer to make a length of the upper gate shorter than that of the bottom gate.

Abstract: A thin film transistor (TFT) includes a poly-silicon island, a gate insulating layer, a gate stack layer, and a dielectric layer. The poly-silicon island includes a source region and a drain region. The gate insulating layer covers the poly-silicon island. The gate stack layer is disposed on the gate insulating layer and includes a first conductive layer and a second conductive layer. A length of the first conductive layer is less than a length of the second conductive layer. The dielectric layer covers the gate insulating layer and the gate stack layer, and therefore a number of cavities are formed between the second conductive layer and the gate insulating layer.

Abstract: A microsensor fabricated with a ferroelectric material and a fabrication method therefor are provided. The microsensor includes a support, an insulating layer on the support, a first electrode on the insulating layer, a ferroelectric layer having at least a metal on the insulating layer and the first electrode, and at least a second electrode on the ferroelectric layer.

Abstract: An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.

Abstract: The present invention discloses a method for fabricating a bottom-gate low-temperature polysilicon thin film transistor, wherein the bottom gate structure is used to form an amorphous silicon layer with varied thicknesses; the amorphous silicon layer in the step region on the border of the bottom gate structure is partially melted by an appropriate amount of laser energy; the partially-melted amorphous silicon layer in the step region functions as crystal seeds and makes crystal grains grow toward the channel region where the amorphous silicon layer is fully melted, and the crystal grains are thus controlled to grow along the lateral direction to form a lateral-grain growth low-temperature polysilicon thin film. The lateral grain growth can reduce the number of the grain boundaries carriers have to pass through. Thus, the present invention can promote the carrier mobility in the active region and the electric performance.

Abstract: An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.

Abstract: A microsensor fabricated with a ferroelectric material and a fabrication method therefor are provided. The microsensor includes a support, an insulating layer on the support, a first electrode on the insulating layer, a ferroelectric layer having at least a metal on the insulating layer and the first electrode, and at least a second electrode on the ferroelectric layer.

Abstract: A structure of an organic light-emitting TFT LCD and the method for making the same are disclosed. The invention provides a glass substrate on which a TFT IC is formed. A metal layer forms the top layer of the TFT. Afterwards, a white light-emitting organic material layer is deposited thereon. A cover layer is then used to flatten the surface of the organic material layer. Finally, a photo mask pattern and a color filter plate are formed, completing the assembly of the TFT LCD.

Abstract: A power chip set for a switching mode power supply includes a high voltage chip and a control unit chip. The high voltage chip contains a switching power metal-oxide-semiconductor (MOS) transistor being turned on/off under control of an output signal from the control unit, and a junction field effect transistor (JFET) coupled between a drain of the switching power MOS transistor and a power terminal of the control unit to serve as a start up element for driving the control unit during initiation, in which the JFET has a negative threshold voltage and the absolute value thereof is equal to the voltage for driving the control unit. The JFET structure in the high voltage chip further includes a Zener diode for over voltage protection of the control unit. The high voltage chip further contains a current-sense power MOS transistor coupled with the drain of the switching power MOS transistor for detecting a drain current of the switching power MOS transistor. The chip set can be packaged into a power module.

Abstract: A structure of an organic light-emitting material TFT display and the method for making the same are disclosed. The invention provides a glass substrate formed with a plurality of TFTs thereon. A metal layer is formed on top of the TFT's. Afterwards, a planarized film layer covers the TFTs and the metal layer. The planarized film layer is formed with an organic light-emitting material pattern layer with red, blue and green colors. The organic light-emitting material pattern layer is in alignment with the TFT pattern. A transparent conductive glass layer is formed on top of the light-emitting material pattern layer. Finally, a photo mask pattern fills the light-emitting material pattern layer to prevent the mixture of different colors.

Abstract: A structure of an organic light-emitting material TFT LCD and the method for making the same are disclosed. The invention provides a glass substrate formed with a plurality of TFT's thereon. A metal layer is formed on top of the TFT's. Afterwards, a planarized film layer covers the TFT's and the metal layer. The planarized film layer is formed with an organic light-emitting material pattern layer with red, blue and green colors. The organic light-emitting material pattern layer is in alignment with the TFT pattern. A transparent conductive glass layer is formed on top of the light-emitting material pattern layer. Finally, a photo mask pattern fills the light-emitting material pattern layer to prevent the mixture of different colors.

Abstract: A process of forming a field emission electrode for manufacturing a field emission array is provided. The process includes steps of (a) providing a substrate having a metal layer thereon, (b) forming a plurality of mask units on the metal layer and partially removing the metal layer uncovered by the mask units, (c) oxidizing a surface of the remained metal layer by an anodic oxidization method for forming a metal oxide layer thereon such that an upper portion of the unoxidized remained metal layer is in the shape of plural conoids, and (d) removing the remained mask units and the metal oxide layer.

Abstract: A structure of an organic light-emitting material TFT LCD and the method for making the same are disclosed. The invention provides a glass substrate formed with a plurality of TFT's thereon. A metal layer is formed on top of the TFT's. Afterwards, a planarized film layer covers the TFT's and the metal layer. The planarized film layer is formed with an organic light-emitting material pattern layer with red, blue and green colors. The organic light-emitting material pattern layer is in alignment with the TFT pattern. A transparent conductive glass layer is formed on top of the light-emitting material pattern layer. Finally, a photo mask pattern fills the light-emitting material pattern layer to prevent the mixture of different colors.