Patents by Inventor Huang-Hui Chang

Huang-Hui Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dimple-free tungsten plug
    Patent number: 5672914
    Abstract: A new method of metallization using a dimple-free tungsten plug is described. Semiconductor device structures are formed in and on a semiconductor substrate. An insulating layer is deposited overlying the semiconductor device structures. An opening is etched through the insulating layer to contact one of the semiconductor device structures. A layer of tungsten is deposited overlying the insulating layer and within the opening. The tungsten layer is coated with a layer of spin-on-glass wherein the spin-on-glass layer planarizes the top surface of the substrate. The spin-on-glass and tungsten layers are etched back leaving the tungsten layer only within the opening as a tungsten plug wherein the presence of the spin-on-glass layer overlying the tungsten layer prevents the formation of a dimple within the tungsten plug completing the formation of the dimple-free tungsten plug in the fabrication of an integrated circuit.
    Type: Grant
    Filed: April 22, 1996
    Date of Patent: September 30, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuan-Chang Huang, Huang-Hui Chang
  • Dimple-free tungsten etching back process
    Patent number: 5527736
    Abstract: A new method of metallization using a dimple-free tungsten plug is described. Semiconductor device structures are formed in and on a semiconductor substrate. An insulating layer is deposited overlying the semiconductor device structures. An opening is etched through the insulating layer to contact one of the semiconductor device structures. A layer of tungsten is deposited overlying the insulating layer and within the opening. The tungsten layer is coated with a layer of spin-on-glass wherein the spin-on-glass layer planarizes the top surface of the substrate. The spin-on-glass and tungsten layers are etched back leaving the tungsten layer only within the opening as a tungsten plug wherein the presence of the spin-on-glass layer overlying the tungsten layer prevents the formation of a dimple within the tungsten plug completing the formation of the dimple-free tungsten plug in the fabrication of an integrated circuit.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: June 18, 1996
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Yuan-Chang Huang, Huang-Hui Chang