Abstract: Disclosed are a system and method for automatically evaluating an essay. The system includes a structure analysis module configured to divide learning data and learner essay text in a predetermined structure analysis unit, generate structure tagging information for each structure analysis unit, and structure the learning data and the learner essay text by attaching the structure tagging information to the learning data and the learner essay text, a learning module configured to generate an essay evaluation model through learning by using essay text that is included in the structured learning data and the structure tagging information as an input value and using an evaluation score that is included in the structured learning data as a label, and an evaluation module configured to generate essay evaluation results using the essay evaluation model.

Abstract: A trimming method is provided. The trimming method includes the following steps. A first wafer including a substrate and a device layer over a first side of the substrate is provided. The first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer. An edge trimming process is performed to remove a trimmed portion of the substrate from a second side opposite to the first side vertically downward toward the first side in a first direction along a perimeter of the substrate, wherein the edge trimming process results in the substrate having a flange pattern laterally protruding from the device layer and laterally surrounding an untrimmed portion of the substrate along a second direction perpendicular to the first direction.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin, a second fin and a third fin therebetween. A first insulating structure includes a first insulating layer formed between the first and third fins, a capping structure covering the first insulating layer, a first insulating liner covering sidewall surfaces of the first insulating layer and the capping structure and a bottom surface of the first insulating layer, and a second insulating liner formed between the first insulating liner and the first fin and between the first insulating liner and the third fin. The second insulating structure includes a second insulating layer formed between the second fin and the third fin and a third insulating liner formed between the second insulating layer and the second fin and between the second insulating layer and the third fin.

Abstract: Devices and method for forming a shielding assembly including a first chip package structure sensitive to magnetic interference (MI), a second chip package structure sensitive to electromagnetic interference (EMI), and a shield surrounding sidewalls and top surfaces of the first chip package structure and the second chip package structure, in which the shield is a magnetic shielding material. In some embodiments, the shield may include silicon steel, in some embodiments, the shield may include Mu-metal. The silicon-steel-based or Mu-metal-based shield may provide both EMI and MI protection to multiple chip package structures with various susceptibilities to EMI and MI.

Abstract: Monoclonal antibodies against human Mac-1 are provided. These antibodies can bind to different states of Mac-1 so as to alter the biofunctions of Mac-1. These antibodies can modulate Th1/Th2 cytokine secretions by TLR-activated immune cells and can be used for the treatments of diseases related to acute and chronic inflammatory disorders, such as infectious diseases, and cancers.

Abstract: A wafer probe test system having a probe card with a probe head, a rotary magnet, a magnetic sensor positioned to sense the magnetic field of the rotary magnet and a controller coupled to the probe card, where the probe head has probe needles to engage features of test sites of a wafer in a wafer plane of orthogonal first and second directions, and the rotary magnet is rotatable around an axis of a third direction to provide a magnetic field to the wafer, in which the controller includes a model of magnetic flux density in the first, second and third directions at the respective test sites of the wafer as a function of a rotational angle of the rotary magnet, a probe needle height along the third direction and a measured magnetic flux density of the magnetic sensor.

Abstract: An interactive exercise apparatus for guiding a user to perform an exercise includes a display device and a detecting device. The display device is configured to display video imagery which shows an instructor image and at least one motion check image. The motion check image corresponds to a predetermined one of a plurality of body parts of the user, which has a motion guide track and a motion achievement evaluation. The detecting device is configured to detect displacement of the body parts. The motion guide track is displayed on a predetermined position of the video imagery with a predetermined track pattern, corresponding to a movement path of the predetermined body part when the user follows movements demonstrated by the instructor image to perform the exercise. The motion achievement evaluation indicates a matching degree determined according to the displacement of the predetermined body part detected by the detecting device.

Abstract: Control logic in a memory device executes a programming operation to program the set of memory blocks of the set of memory planes to a set of a programming levels. In response to determining at least a portion of a first memory block passed a program verify operation associated with a last programming level of the set of programming levels, the control logic executes a first program sub-operation to terminate the programming operation with respect to a first subset of one or more memory planes of the set of memory planes that passed the program verify operation associated with the last programming level and identify a second subset of one or more memory planes that failed the program verify operation associated with the last programming level. The control logic executes a second program sub-operation to apply a trim set to the second subset of one or more memory planes that failed the program verify operation of the last programming level.

Abstract: Disclosed in some examples are methods, systems, devices, memory devices, and machine-readable mediums for using a non-defective portion of a block of memory on which there is a defect on a different portion. Rather than disable the entire block, the system may disable only a portion of the block (e.g., a first deck of the block) and salvage a different portion of the block (e.g., a second deck of the block).

Abstract: Disclosed in some examples are methods, systems, devices, memory devices, and machine-readable mediums for using a non-defective portion of a block of memory on which there is a defect on a different portion. Rather than disable the entire block, the system may disable only a portion of the block (e.g., a first deck of the block) and salvage a different portion of the block (e.g., a second deck of the block).

Abstract: An expansion card holder assembly that accepts different size expansion cards is disclosed. The expansion card holder assembly includes a metal base with grooves that roller features of a metal slide bracket fit into. The metal slide bracket is positioned along the metal base for different size expansion cards. The metal slide bracket is connected with a metal cover that is opened to accept expansions cards. A connector is provided for the expansion card to connect with printed circuit board.

Abstract: A method of operating a memory device comprises generating a target voltage using a pump circuit of the memory device, the target voltage to be applied to a word line or pillar of a memory cell of the memory device; providing an indication of current generated by the pump circuit after the pump circuit output reaches the target voltage; and determining when the current generated by the pump circuit is greater than a specified threshold current and generating a fault indication according to the determination.

Abstract: A processing device in a memory system receives a request to erase a data block of a memory device, determines a number of program/erase cycles performed on the data block, and performs an erase operation to erase the data block. The processing device further determines that the number of program/erase cycles performed on the data block satisfies a scan threshold condition and performs a first threshold voltage integrity scan on the data block to determine a first error rate associated with a current threshold voltage of at least one select gate device of the data block. Responsive to the first error rate associated with the current threshold voltage of the at least one select gate device satisfying an error threshold criterion, the processing device performs a touch up operation on the at least one select gate device to adjust the current threshold voltage to the target threshold voltage.

Abstract: An assembly line includes a conveyor belt and an energy charging system. The energy charging system includes (i) a resonator having a TX resonator disposed along the conveyor belt and a RX resonator mounted on and transported by the conveyor belt, (ii) an impedance matching network in communication with the resonator, (iii) and an energy storage device in communication with at least one of the resonator and the impedance matching network. Vmin is a minimum voltage of the energy storage device, and Vcap is a voltage across the energy storage device measured in real time. Energy is transferred from the TX resonator to the RX resonator when the Vcap is less than Vmin of the energy storage device.

Abstract: An expansion card holder assembly that accepts different size expansion cards is disclosed. The expansion card holder assembly includes a metal base with grooves that roller features of a metal slide bracket fit into. The metal slide bracket is positioned along the metal base for different size expansion cards. The metal slide bracket is connected with a metal cover that is opened to accept expansions cards. A connector is provided for the expansion card to connect with printed circuit board.

Abstract: A resistive memory cell includes a lower electrode, a resistive transition metal oxide layer, and an upper electrode. The lower electrode includes at least one lower metallic barrier layer, a lower metal layer including a first metal having a melting point higher than 2,000 degrees Celsius, and a transition metal compound layer including an oxide or nitride of a transition metal selected from Ti, Ta, and W. The resistive transition metal oxide layer includes a conductive-filament-forming dielectric oxide of at least one transition metal and located on the transition metal compound layer. The upper electrode includes an upper metal layer including a second metal having a melting point higher than 2,000 degrees Celsius and at least one upper metallic barrier layer.

Abstract: A fly ash treatment method includes: a setting step: finding out an initial viscosity value of initial fly ash; a pickling operation step: adding the initial fly ash, water and an acid to a pickling tank, uniformly stirring the mixture, and detecting and adjusting a ratio of components of slurry in the pickling tank to conform to a variation of the curve in the heavy metal leaching test curve graph; a first quantitative output step: inputting the slurry into a first buffer tank and quantitatively output the slurry; a first filtration step: filtering fine particles in the slurry output by from the first buffer tank; a drying and pulverizing step: removing water from the slurry passing through the first filter, and performing pulverizing to form powder; and a rotary kiln cracking step: cracking organic matters in the powder by a rotary kiln, and collecting fly ash cinder.

Abstract: Disclosed in some examples are methods, systems, devices, memory devices, and machine-readable mediums for using a non-defective portion of a block of memory on which there is a defect on a different portion. Rather than disable the entire block, the system may disable only a portion of the block (e.g., a first deck of the block) and salvage a different portion of the block (e.g., a second deck of the block).

Abstract: A method of operating a memory device comprises generating a target voltage using a pump circuit of the memory device, the target voltage to be applied to a word line or pillar of a memory cell of the memory device; providing an indication of current generated by the pump circuit after the pump circuit output reaches the target voltage; and determining when the current generated by the pump circuit is greater than a specified threshold current and generating a fault indication according to the determination.

Abstract: A projection device includes: an illumination system providing an illumination beam; a light valve disposed on a transmission path of the illumination beam to modulate the illumination beam into an image beam; and a projection lens disposed on a transmission path of the image beam to project the image beam out of the projection device to form a portrait image. A center of the light valve has a first offset relative to a reference plane in a long side direction of the light valve. The reference plane includes a central axis of the projection lens. The reference plane is perpendicular to the long side direction of the light valve. A center of the portrait image has a second offset relative to the reference plane in a long side direction of the portrait image. The projection device of the invention provides a portrait image with favorable display quality.