Patents by Inventor Huang Tsai

Huang Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145632
    Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Ming-Chun TSENG, Shaohua HUANG, Hongwei WANG, Kang-Wei PENG, Su-Hui LIN, Xiaomeng LI, Chi-Ming TSAI, Chung-Ying CHANG
  • Publication number: 20240145564
    Abstract: The invention provides a semiconductor structure, which comprises a substrate, a gate dielectric layer on the substrate, wherein the gate dielectric layer comprises two sidewall portions and a horizontal portion between the two sidewall portions, wherein a height of the horizontal portion is lower than that of the two sidewall portions, and the horizontal portion and the two sidewall portions are perpendicular to each other, and a gate conductive layer on the horizontal portion of the gate dielectric layer.
    Type: Application
    Filed: November 25, 2022
    Publication date: May 2, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Tzu-I Tsai, Shih-An Huang
  • Patent number: 11961774
    Abstract: A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes multiple chip regions and a strip line for separating the chip regions. A test key is formed in the strip line and is used for a bit line contact (BLC) resistance test. The test key includes active regions and connecting structures. The active regions are formed in the semiconductor substrate. The connecting structures are located at ends of the active regions. The multiple active regions located on the same column are sequentially connected end to end by the connecting structures.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 16, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Chen Huang, Meng-Feng Tsai
  • Patent number: 11938508
    Abstract: A glue dispenser dispensing switch includes a switching device main body, a needle holding base, a wear-resistant plate, and a rotating device. The switching device main body is equipped with a double liquid inlet, the needle holding base is equipped with a mixed glue outlet, the wear-resistant plate is installed between the switching device main body and the needle holding base, and the wear-resistant plate is equipped with a wear-resistant plate opening. The rotating device is utilized to rotate the needle holding base or the wear-resistant plate. A mixed double-liquid glue passes through the double liquid inlet, the wear-resistant plate opening and the glue outlet to dispense a mixed glue while the double liquid inlet, the wear-resistant plate opening and the glue outlet are overlapped. In addition, a double liquid dispensing equipment is also disclosed herein.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: March 26, 2024
    Assignee: Kulicke and Soffa Hi-Tech Co., Ltd.
    Inventors: Lu-Min Chen, Mu-Huang Liu, Tsung-Lin Tsai
  • Publication number: 20240091838
    Abstract: A forming method of a processing curve in a stamping process is provided. The method includes the following steps. A plurality of processing curves are established, and an optimization target is set for the processing curves according to material characteristics of a workpiece, process requirements and a finished product CAD file. At least two of the processing curves are selected and superimposed to form a basic forming curve, wherein each subsection of the basic forming curve corresponds to a selected processing curve. Whether the selected processing curve in each subsection of the basic forming curve matches the optimization target is determined.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 21, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Huang SHIEH, Hsuan-Yu HUANG, Ming-Cheng TSAI, Yi-Ping HUANG
  • Patent number: 11935769
    Abstract: The present disclosure provides a chemical supply system, including a chamber, a tubing extending into the chamber, an interlock apparatus, including a fixture for fastening the tubing, and means for determining whether the tubing is fastened by the fixture.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fang-Pin Chiang, Tsung-Lin Tsai, Chaoyen Huang, Yi Chuan Chen
  • Patent number: 11922220
    Abstract: Embodiments of systems, apparatuses and methods provide enhanced function as a service (FaaS) to users, e.g., computer developers and cloud service providers (CSPs). A computing system configured to provide such enhanced FaaS service include one or more controls architectural subsystems, software and orchestration subsystems, network and storage subsystems, and security subsystems. The computing system executes functions in response to events triggered by the users in an execution environment provided by the architectural subsystems, which represent an abstraction of execution management and shield the users from the burden of managing the execution. The software and orchestration subsystems allocate computing resources for the function execution by intelligently spinning up and down containers for function code with decreased instantiation latency and increased execution scalability while maintaining secured execution.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: March 5, 2024
    Assignee: Intel Corporation
    Inventors: Mohammad R. Haghighat, Kshitij Doshi, Andrew J. Herdrich, Anup Mohan, Ravishankar R. Iyer, Mingqiu Sun, Krishna Bhuyan, Teck Joo Goh, Mohan J. Kumar, Michael Prinke, Michael Lemay, Leeor Peled, Jr-Shian Tsai, David M. Durham, Jeffrey D. Chamberlain, Vadim A. Sukhomlinov, Eric J. Dahlen, Sara Baghsorkhi, Harshad Sane, Areg Melik-Adamyan, Ravi Sahita, Dmitry Yurievich Babokin, Ian M. Steiner, Alexander Bachmutsky, Anil Rao, Mingwei Zhang, Nilesh K. Jain, Amin Firoozshahian, Baiju V. Patel, Wenyong Huang, Yeluri Raghuram
  • Patent number: 11899048
    Abstract: A voltage state detector includes a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, first and second output terminals, and a logic circuit. The pull-down circuit is coupled to the voltage drop circuit. The transistor has a first terminal coupled to the load circuit, a second terminal coupled to the pull-down circuit, and a control terminal coupled to the voltage drop circuit. The pull-up circuit is coupled to the load circuit and the voltage drop circuit. The first output terminal is coupled to the first terminal of the transistor for outputting a first state determination signal. The second output terminal is coupled to the voltage drop circuit for outputting a second state determination signal. The logic circuit includes a NOR gate for performing an NOR operation on the first state determination signal and the second state determination signal to output a control signal.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: February 13, 2024
    Assignee: RichWave Technology Corp.
    Inventors: Tien-Yun Peng, Hsien-Huang Tsai, Chih-Sheng Chen
  • Publication number: 20230194574
    Abstract: A voltage state detector includes a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, first and second output terminals, and a logic circuit. The pull-down circuit is coupled to the voltage drop circuit. The transistor has a first terminal coupled to the load circuit, a second terminal coupled to the pull-down circuit, and a control terminal coupled to the voltage drop circuit. The pull-up circuit is coupled to the load circuit and the voltage drop circuit. The first output terminal is coupled to the first terminal of the transistor for outputting a first state determination signal. The second output terminal is coupled to the voltage drop circuit for outputting a second state determination signal. The logic circuit includes a NOR gate for performing an NOR operation on the first state determination signal and the second state determination signal to output a control signal.
    Type: Application
    Filed: February 16, 2023
    Publication date: June 22, 2023
    Applicant: RichWave Technology Corp.
    Inventors: Tien-Yun Peng, Hsien-Huang Tsai, Chih-Sheng Chen
  • Publication number: 20230094463
    Abstract: Disclosed herein are methods and compositions for disrupting an interaction between Galectin-3 and insulin receptor or integrins. Further disclosed herein are methods and compositions for the treatment of a disease or a disorder in a subject, such as the treatment of diabetes mellitus, inflammatory bowel syndrome, non-alcoholic fatty liver disease, and nonalcoholic steatohepatitis.
    Type: Application
    Filed: December 3, 2020
    Publication date: March 30, 2023
    Inventors: Dongxu Sun, Jing Zhang, Maja Bonacorsi, Yinan Wu, Yadong Yu, Catherine A. Gordon, Tsung-Huang Tsai, Ksenya Shchors, Samuel A.F. Williams
  • Publication number: 20230096349
    Abstract: A method is provided for fabricating a film layer. A cathode film layer of lithium ion batteries is fabricated through atmospheric plasma spraying (APS) without using polymer adhesive. The ratio of its active substance can even reach 100%. Moreover, the cathode film layer fabricated by APS obtains pores, where, with the coordination of a liquid electrolyte, electrolyte penetration paths are provided to significantly increase the area of reaction. Hence, the effective thickness of the film layer is relatively thick and the capacity of battery is increased. As an example, the thickness of a film layer of lithium cobalt oxide fabricated accordingly reaches more than 100 microns; and its maximum electric capacity per unit area reaches 6 milliampere-hours per square centimeter (mAh/cm2). Thus, the performance of the follow-on solid-state lithium-ion battery is improved and its high-volume manufacturing cost is reduced.
    Type: Application
    Filed: September 27, 2021
    Publication date: March 30, 2023
    Inventors: Chun-Laing Chang, Chun-Huang Tsai, Chang-Shiang Yang, Cheng-Yun Fu, Min-Chuan Wang, Tien-Hsiang Hsueh
  • Patent number: 11609249
    Abstract: A voltage state detector includes an input terminal, a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, a first output terminal, and a second output terminal. The voltage drop circuit is coupled to the input terminal. The pull-down circuit is coupled to the voltage drop circuit and a first reference terminal. The load circuit is coupled to a second reference terminal. The transistor has a first terminal coupled to the load circuit, a second terminal coupled to the first reference terminal, and a control terminal coupled to the voltage drop circuit. The pull-up circuit is coupled to the second reference terminal and the voltage drop circuit. The first output terminal is coupled to the first terminal of the transistor for outputting a first state determination signal. The second output terminal is coupled to the voltage drop circuit for outputting a second state determination signal.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 21, 2023
    Assignee: RichWave Technology Corp.
    Inventors: Tien-Yun Peng, Hsien-Huang Tsai, Chih-Sheng Chen
  • Publication number: 20230058738
    Abstract: A driving circuit includes a first reference terminal, a second reference terminal, at least one input terminal, an output terminal, a first transistor, a second transistor, a switch module, and at least one control signal terminal. The at least one input terminal receives at least one input signal. The output terminal outputs an output signal in response to the at least one input signal. The first transistor and the second transistor respectively include control terminals coupled to the at least one input terminal. The switch module includes at least one control terminal coupled to the at least one control signal terminal to receive at least one control signal. The at least one input signal has a transition period. The switch module can be turned off according to the at least one control signal.
    Type: Application
    Filed: December 14, 2021
    Publication date: February 23, 2023
    Applicant: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Tien-Yun Peng, Hsien-Huang Tsai
  • Publication number: 20230036181
    Abstract: Disclosed herein are antibodies and compositions used for binding to Gal3. Some embodiments allow for disrupting interactions between Galectin-3 (Gal3) and cell surface markers and/or proteins associated with neurological diseases and/or proteopathies, such as Alzheimer's disease. Additionally, disclosed herein are methods of treatment and uses of the antibodies or binding fragments thereof for the treatment of fibrosis, liver fibrosis, kidney fibrosis, cardiac fibrosis, pulmonary fibrosis, non-alcoholic fatty liver disease, non-alcoholic steatohepatitis, sepsis, atopic dermatitis, psoriasis, cancer, brain cancer, breast cancer, colorectal cancer, kidney cancer, liver cancer, lung cancer, pancreatic cancer, bladder cancer, stomach cancer, hematological malignancy, neurological diseases and/or proteopathies. Furthermore, some embodiments provided herein can cross the blood-brain barrier and can be conjugated or otherwise associated with one or more payloads for the treatment of a neurological disease.
    Type: Application
    Filed: July 12, 2022
    Publication date: February 2, 2023
    Inventors: Dongxu Sun, Suhail Rasool, Catherine A. Gordon, Ke Hong, Fan Chen, Sara Matilda Bolin, Ksenya Shchors, Yadong Yu, Tsung-Huang Tsai, Samuel A.F. Williams, Karan Lala, Heng Wu, Yan Wang
  • Patent number: 11543902
    Abstract: A touch panel includes a substrate, a peripheral circuit layer, and a touch sensing electrode layer. The substrate has a visible region and a border region surrounding the visible region. The peripheral circuit layer is disposed on the substrate and located in the border region, and has at least one concave portion, in which the concave portion is located on a surface of the peripheral circuit layer facing away from the substrate. The touch sensing electrode layer is disposed in the visible region and partially extends to the border region to at least cover the concave portion, in which the touch sensing electrode layer has at least one entering portion extending into the concave portion.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: January 3, 2023
    Assignee: TPK Advanced Solutions Inc.
    Inventors: Li-Huang Tsai, Zi-Jun Ding, Yun-Guo Xu, Jian-Hua Fang, Li-De Lv
  • Patent number: 11487369
    Abstract: A touch panel having dummy pattern is provided, including a first metal nanowire layer and a second metal nanowire layer. The first metal nanowire layer includes first electrode wires, first axial wires connected to the first electrode wires, and first dummy patterns. The second metal nanowire layer includes a plurality of second electrode wires and a plurality of second axial wires connected to the second electrode wires. The first dummy patterns are electrically insulated and deposited outside the first electrode wires and the first axial wires, and each of the first dummy patterns comprises a plurality of first etching areas extending along the first and second directions. The first dummy patterns do not expose the first etching areas along the first direction at a vertical projection area of a part where each of the second axial wires alone exists, so that the electrode pattern is difficult to observe.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: November 1, 2022
    Assignee: TPK Advanced Solutions Inc.
    Inventors: Qin-Xue Fang, Xiang-Xing Xu, Yong-Bin Ke, Yi-Peng Gan, Li-Huang Tsai
  • Publication number: 20220254661
    Abstract: A hot plate cooling system is provided, configured to cool a hot plate, including a chamber and a cooling module. The hot plate is placed in the chamber. The cooling module extends into the chamber and faces the hot plate. The cooling module includes a nozzle member, a shell member, and a discharge channel. The nozzle member faces the hot plate for spraying a working fluid onto the hot plate. The shell member has a receiving groove surrounding the nozzle member. The discharge channel is connected to the shell member and communicates with the receiving groove. When the nozzle member sprays the working fluid to cool the hot plate, the working fluid is conveyed through the nozzle member toward a surface of the hot plate, and the working fluid is sequentially discharged from the hot plate cooling system through the receiving groove to the discharge channel.
    Type: Application
    Filed: August 26, 2021
    Publication date: August 11, 2022
    Inventors: Yao-Huang TSAI, Mi-Ning LI
  • Publication number: 20220171476
    Abstract: A touch panel includes a substrate, a peripheral circuit layer, and a touch sensing electrode layer. The substrate has a visible region and a border region surrounding the visible region. The peripheral circuit layer is disposed on the substrate and located in the border region, and has at least one concave portion, in which the concave portion is located on a surface of the peripheral circuit layer facing away from the substrate. The touch sensing electrode layer is disposed in the visible region and partially extends to the border region to at least cover the concave portion, in which the touch sensing electrode layer has at least one entering portion extending into the concave portion.
    Type: Application
    Filed: November 27, 2020
    Publication date: June 2, 2022
    Inventors: Li-Huang Tsai, Zi-Jun Ding, Yun-Guo Xu, Jian-Hua Fang, Li-De Lv
  • Patent number: 11346389
    Abstract: A rotary closed-valve vacuum suction device is mounted to a bottom of an object, and has a valve assembly, a sucker, and a valve part. The valve assembly has a top valve seat and a bottom valve seat mounted below the top valve seat. The sucker is mounted to a bottom of the valve assembly. The valve part is inserted through a valve hole of the sucker and the bottom valve seat, and is connected to the top valve seat. When one of the top valve seat and the bottom valve seat is rotated to change the relative position between the bottom valve seat and the top valve seat in a height direction of the valve assembly, the valve part switches the valve hole of the sucker between an open state and a closed state.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: May 31, 2022
    Assignee: NINE THREE INTERNATIONAL CO., LTD.
    Inventors: Kuo-Chang Chen, Hsin-Huang Tsai, Chun-Yen Tsao
  • Publication number: 20220163573
    Abstract: A voltage state detector includes an input terminal, a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, a first output terminal, and a second output terminal. The voltage drop circuit is coupled to the input terminal. The pull-down circuit is coupled to the voltage drop circuit and a first reference terminal. The load circuit is coupled to a second reference terminal. The transistor has a first terminal coupled to the load circuit, a second terminal coupled to the first reference terminal, and a control terminal coupled to the voltage drop circuit. The pull-up circuit is coupled to the second reference terminal and the voltage drop circuit. The first output terminal is coupled to the first terminal of the transistor for outputting a first state determination signal. The second output terminal is coupled to the voltage drop circuit for outputting a second state determination signal.
    Type: Application
    Filed: December 30, 2020
    Publication date: May 26, 2022
    Inventors: Tien-Yun Peng, Hsien-Huang Tsai, Chih-Sheng Chen