Patents by Inventor Huang-Wen WANG

Huang-Wen WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11768793
    Abstract: A plug-in mobile peripheral component interconnect express module connector is disclosed, comprising a plastic body, and a first terminal set and a second terminal set disposed relatively in the plastic body. The plastic body includes transversely penetrated slots, an upper end surface of the slots has intermittently plural upper magazines, and a lower end surface has intermittently plural lower magazines. The first terminal set includes plural first elastic terminals inserted in the upper magazines, and the second terminal set includes plural second elastic terminals inserted in the lower magazines. Each first elastic terminal is opposed to each second elastic terminal, forming a holding gap. A motherboard is inserted between the first elastic terminals and the second elastic terminals from a side, and an MXM board is inserted between the first elastic terminals and the second elastic terminals from the other side.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: September 26, 2023
    Assignee: DUN-PU ELECTRONICS CO. LTD.
    Inventor: Huang-Wen Wang
  • Publication number: 20220374380
    Abstract: A plug-in mobile peripheral component interconnect express module connector is disclosed, comprising a plastic body, and a first terminal set and a second terminal set disposed relatively in the plastic body. The plastic body includes transversely penetrated slots, an upper end surface of the slots has intermittently plural upper magazines, and a lower end surface has intermittently plural lower magazines. The first terminal set includes plural first elastic terminals inserted in the upper magazines, and the second terminal set includes plural second elastic terminals inserted in the lower magazines. Each first elastic terminal is opposed to each second elastic terminal, forming a holding gap. A motherboard is inserted between the first elastic terminals and the second elastic terminals from a side, and an MXM board is inserted between the first elastic terminals and the second elastic terminals from the other side.
    Type: Application
    Filed: May 21, 2021
    Publication date: November 24, 2022
    Inventor: Huang-Wen WANG
  • Patent number: 10374129
    Abstract: An improved high temperature resistant backside metallization for compound semiconductors comprises a front-side metal layer formed on a compound semiconductor substrate; at least one via hole penetrating the compound semiconductor substrate, a top of an inner surface of the via hole is defined by the front-side metal layer; at least one seed metal layer, at least one backside metal layer and at least one diffusion barrier layer sequentially formed on a bottom surface of the compound semiconductor substrate and the inner surface of the via hole, the seed metal layer and the front-side metal layer are electrically connected through the via hole; a die attachment metal layer formed on a bottom surface of the diffusion barrier layer other than the via hole and an adjacent area near the via hole. The diffusion barrier layer prevents the backside metal layer from diffusing into the die attachment metal layer.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: August 6, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chang-Hwang Hua, Shu Chen Chen, Huang-Wen Wang, Walter Tony Wohlmuth
  • Publication number: 20190096755
    Abstract: An improved high temperature resistant backside metallization for compound semiconductors comprises a front-side metal layer formed on a compound semiconductor substrate; at least one via hole penetrating the compound semiconductor substrate, a top of an inner surface of the via hole is defined by the front-side metal layer; at least one seed metal layer, at least one backside metal layer and at least one diffusion barrier layer sequentially formed on a bottom surface of the compound semiconductor substrate and the inner surface of the via hole, the seed metal layer and the front-side metal layer are electrically connected through the via hole; a die attachment metal layer formed on a bottom surface of the diffusion barrier layer other than the via hole and an adjacent area near the via hole. The diffusion barrier layer prevents the backside metal layer from diffusing into the die attachment metal layer.
    Type: Application
    Filed: November 15, 2017
    Publication date: March 28, 2019
    Inventors: Chang-Hwang HUA, Shu Chen CHEN, Huang-Wen WANG, Walter Tony WOHLMUTH