Abstract: An example system includes a memory controller; a memory bus coupled to the memory controller; and a dual inline memory module (DIMM) coupled to the memory controller through the memory bus. The DIMM includes a dynamic random access memory (DRAM) portion; a storage portion; and a gate array portion coupled to the memory bus to detect memory access signals and to store information related to the memory access signals on the storage portion.

Abstract: A bridge comprises an interface to a plurality of hosts, an interface to a single-ported storage drive and arbitration logic. The arbitration logic controls and permits concurrent access by the hosts to the single-ported storage drive so that the bridge need not store read or write data being received from or provided to the storage drive.

Abstract: A system includes a peripheral device and an expander having interfaces to couple to one or more peripheral devices and an expander. The expander has a storage to store entries containing routing information used to route a request received by the expander to one of the interfaces, wherein each interface is allocated to a respective set of routing information entries. Mapping logic remaps unused routing information of one of the interfaces to one or more other interfaces to expand capacity of the one or more other interfaces.

Abstract: A drive array controller or other data handling system supports dynamic data routing across multiple data paths between a source controller and a destination controller. Each data path between the source controller and the data controller can include a cache memory. Based on detection of a cache address, the data path with the cache memory corresponding to the cache address is selected. Data transfer to a single destination controller can be alternated between different data paths based on detection of different cache addresses. Each data path can include a plurality of bus/memory interface devices and a peripheral bus such as a peripheral component interconnect (PCI) bus. As an alternative to dynamic data routing based on addressing, data routing can be based on command type.

Abstract: Address translation between various peripheral bus interfaces is provided through a bus interface device. Specifically, the bus interface device translates incoming transactions from a source bus interface to a different address or location within a destination bus interface. Flexibility for communications between multiple bus interfaces having different, possibly conflicting, address spaces is ensured by allowing the internal translation registers to be dynamically reprogrammed. Reprogramming of the translation registers may occur during runtime bus operations. These registers define translation windows within which a transaction will be claimed and translated to the destination bus interface. Translation is accomplished using the translation registers to identify portions of the incoming received address which should not be translated because those portions contain the information to be communicated.