Abstract: The disclosure is concerned with the testing of system level functionality involving several Protection, Control and Measurement (PCM) Intelligent Electronic Devices (IEDs) of a Substation Automation (SA) system for IEC 61850 compliant substations. An extensive testing of all conceivable control or protection functions/applications of an extended SA system comprising a large number of IEDs with a multitude of configurations is facilitated by simulating at least one of the IEDs in a testing device. Hence, only a limited number of IEDs are physically present as individual devices in a test environment, the behaviour of at least one further IED being simulated by a dedicated testing device with appropriate data processing means. The testing device sends network messages indicative of the behaviour of the simulated IED according to its communication and device configuration over a substation communication network to the physically present IED to be tested. The proper working of the configured IED functions, i.e.

Abstract: The present disclosure relates to highly available communication networks, e.g., for industrial or utility applications such as substation automation. The devices are connected to two redundant lines through two independent transceivers and bus controllers, i.e. the physical layer and the link layer of the corresponding protocol stack is duplicated. For seamless operation, a sender sends frames simultaneously over both lines and a receiver accepts whichever frame of a pair comes first and ignores the late frame. An exemplary method is disclosed for discarding duplicate frames at the link layer without considering the higher protocol layers, based on a counter inserted in the frame and an algorithm for rejection, with a corresponding means to detect which frames operate according to the redundancy protocol.

Abstract: Specimen programs (S1) of a specimen object (1) can be tested by means of an observation tool (2), and the duration of program routines registered and evaluated. In order to achieve a better testing depth, the observation tool (2) is additionally supplied with at least one measurement and/or process signal from at least one simulated process (P′) from a real time simulator (4) or from a process (P) of a plant (3). At least one signal is transmitted from the simulated process (P′) to the observation tool (2), it being possible for this signal to be generated by the process (P) or (P′), and said signal triggering a test by the observation tool (2).

Abstract: In such a multiprocessor, in which the common memory (M) or one of the cache memories (C1, C2) can be owner of a variable determined by its address and in which it is always only the owner of a variable which delivers it to the bus (1) following a read request, the concept of ownership is further developed by the present invention with respect to implementing it with standard buses which, per se, are not intended for this purpose, and with respect to the greatest possible efficiency.

Abstract: In order to reduce the down time of a computer (1, 4-8) caused by a fault or interrupt in the program run, program recovery points are provided which are time-dependent or can be preset in the main program of a useful program, and when these recovery points are reached, the computer status is stored in at least one fault-tolerant archival memory (5, 6). The computer status includes the status of the variables of a useful program being executed, the register status of the processor (1) and the register status of the input/output devices of the computer. During execution of the useful program, at least a part of the current computer status is stored in a main memory (4) and copied into an archival memory (6) when a program recovery point is reached.

Abstract: An allocation system for the use of a data processing system where plural user systems of the data processing system gain access to parallel busses of the data processing system in a sequential manner based on a priority determination. The priority determination involves an allocation circuit for each user that includes a logic network comprising four bistable flip-flops, an edge triggered D flip-flop and a monostable flip-flop. The flip-flop elements in conjunction with a generated request signal, bus approval signal, bus busy signal, bus claim signal, selection duration signal, compare signal, enable signal and greater or equal signal and appropriate AND, NAND, OR and inverter elements determine the winner or next user when plural user requests are received while the bus is busy. The use of the edge triggered D flip-flop allows a user subsequent immediate access if such user wants the bus again and no other user has requested the bus.