Patents by Inventor Hubert M. Bode

Hubert M. Bode has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10032904
    Abstract: A semiconductor device configured with one or more integrated breakdown protection diodes in non-isolated power transistor devices and electronic apparatus, and methods for fabricating the devices.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: July 24, 2018
    Assignee: NXP USA, Inc.
    Inventors: Patrice M. Parris, Hubert M. Bode, Weize Chen, Richard J. DeSouza, Andreas Laudenbach, Kurt U. Neugebauer
  • Patent number: 10003260
    Abstract: Switching control devices and related operating methods are provided. An exemplary electronic device includes a semiconductor die, a driver arrangement on the semiconductor die to generate a switch control output signal based on an input switching command signal, and a timer arrangement on the semiconductor die and coupled to the driver arrangement to measure a time difference between a first change in the command signal and an exhibited response in the switch control signal, which can then be utilized to achieve a desired dead time.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: June 19, 2018
    Assignee: NXP USA, Inc.
    Inventors: Dirk Rowald, Hubert M. Bode
  • Patent number: 9985522
    Abstract: A method and system are provided for digitally controlling a switch mode power supply without using analog-to-digital converters by providing an SMPS output in feedback to first and second comparators along with upper and lower reference voltage thresholds to detect excursion counts at dedicated counters which identify how many times an SMPS output voltage exceeds the upper and lower reference voltage thresholds during each cycle of a fixed frequency PWM signal, where the excursion counts are evaluated with a non-linear multi-step digital control loop detection sequence to generate duty cycle adjustment instructions for controlling each duty cycle of the fixed frequency PWM signal.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: May 29, 2018
    Assignee: NXP USA, Inc.
    Inventors: Stefan G. Luft, Andreas J. Roth, Hubert M. Bode
  • Patent number: 9818863
    Abstract: A device includes a semiconductor substrate having a first conductivity type, a device isolating region in the semiconductor substrate, defining an active area, and having a second conductivity type, a body region in the active area and having the first conductivity type, and a drain region in the active area and spaced from the body region to define a conduction path of the device, the drain region having the second conductivity type. At least one of the body region and the device isolating region includes a plurality of peripheral, constituent regions disposed along a lateral periphery of the active area, each peripheral, constituent region defining a non-uniform spacing between the device isolating region and the body region. The non-uniform spacing at a respective peripheral region of the plurality of peripheral, constituent regions establishes a first breakdown voltage lower than a second breakdown voltage in the conduction path.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: November 14, 2017
    Assignee: NXP USA, INC.
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris
  • Patent number: 9704853
    Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within a portion of the substrate contained by the isolation structure, and a resistor circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region, which is separated from the isolation structure by a portion of the semiconductor substrate having the first conductivity type. The resistor circuit is connected between the isolation structure and the body region. The resistor circuit may include one or more resistor networks and, optionally, a Schottky diode and/or one or more PN diode(s) in series and/or parallel with the resistor network(s).
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: July 11, 2017
    Assignee: NXP USA, INC.
    Inventors: Hubert M. Bode, Weize Chen, Richard J. De Souza, Patrice M. Parris
  • Patent number: 9620496
    Abstract: Protection circuits, device structures and related fabrication methods are provided. An exemplary protection circuit includes a first protection arrangement and a second protection arrangement. The first protection arrangement includes a first transistor having a first collector, a first emitter, and a first base coupled to the first emitter at a first node, and a second transistor having a second collector, a second emitter, and a second base coupled to the second emitter at a second node, the second collector being coupled to the first collector at a third node. The second protection arrangement is coupled electrically in series between the second node and a fourth node. The protection circuit further includes a first diode coupled between the third node and the fourth node.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: April 11, 2017
    Assignee: NXP USA, INC.
    Inventors: Weize Chen, Hubert M. Bode, Andreas Laudenbach, Kurt U. Neugebauer, Patrice M. Parris
  • Publication number: 20170092760
    Abstract: A semiconductor device configured with one or more integrated breakdown protection diodes in non-isolated power transistor devices and electronic apparatus, and methods for fabricating the devices.
    Type: Application
    Filed: December 14, 2016
    Publication date: March 30, 2017
    Inventors: Patrice M. Parris, Hubert M. Bode, Weize Chen, Richard J. DeSouza, Andreas Laudenbach, Kurt U. Neugebauer
  • Patent number: 9607981
    Abstract: Embodiments include methods of forming a semiconductor device having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a source region of the first conductivity type, and the diode circuit is connected between the isolation structure and the source region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: March 28, 2017
    Assignee: NXP USA, INC.
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris
  • Patent number: 9570440
    Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region of the second conductivity type, and the diode circuit is connected between the isolation structure and the body region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: February 14, 2017
    Assignee: NXP USA, Inc.
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris
  • Patent number: 9559097
    Abstract: A semiconductor device configured with one or more integrated breakdown protection diodes in non-isolated power transistor devices and electronic apparatus, and methods for fabricating the devices.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: January 31, 2017
    Assignee: NXP USA, Inc.
    Inventors: Patrice M. Parris, Hubert M. Bode, Weize Chen, Richard J DeSouza, Andreas Laudenbach, Kurt U. Neugebauer
  • Publication number: 20160380536
    Abstract: Switching control devices and related operating methods are provided. An exemplary electronic device includes a semiconductor die, a driver arrangement on the semiconductor die to generate a switch control output signal based on an input switching command signal, and a timer arrangement on the semiconductor die and coupled to the driver arrangement to measure a time difference between a first change in the command signal and an exhibited response in the switch control signal, which can then be utilized to achieve a desired dead time.
    Type: Application
    Filed: June 23, 2015
    Publication date: December 29, 2016
    Applicant: FREESCALE SEMICONDUCTOR INC.
    Inventors: DIRK ROWALD, HUBERT M. BODE
  • Patent number: 9502304
    Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a drain region of the second conductivity type, and the diode circuit is connected between the isolation structure and the drain region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: November 22, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris
  • Publication number: 20160268245
    Abstract: Protection circuits, device structures and related fabrication methods are provided. An exemplary protection circuit includes a first protection arrangement and a second protection arrangement. The first protection arrangement includes a first transistor having a first collector, a first emitter, and a first base coupled to the first emitter at a first node, and a second transistor having a second collector, a second emitter, and a second base coupled to the second emitter at a second node, the second collector being coupled to the first collector at a third node. The second protection arrangement is coupled electrically in series between the second node and a fourth node. The protection circuit further includes a first diode coupled between the third node and the fourth node.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 15, 2016
    Inventors: WEIZE CHEN, HUBERT M. BODE, ANDREAS LAUDENBACH, KURT U. NEUGEBAUER, PATRICE M. PARRIS
  • Publication number: 20160118495
    Abstract: A device includes a semiconductor substrate having a first conductivity type, a device isolating region in the semiconductor substrate, defining an active area, and having a second conductivity type, a body region in the active area and having the first conductivity type, and a drain region in the active area and spaced from the body region to define a conduction path of the device, the drain region having the second conductivity type. At least one of the body region and the device isolating region includes a plurality of peripheral, constituent regions disposed along a lateral periphery of the active area, each peripheral, constituent region defining a non-uniform spacing between the device isolating region and the body region. The non-uniform spacing at a respective peripheral region of the plurality of peripheral, constituent regions establishes a first breakdown voltage lower than a second breakdown voltage in the conduction path.
    Type: Application
    Filed: January 7, 2016
    Publication date: April 28, 2016
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris
  • Publication number: 20160099349
    Abstract: A semiconductor device configured with one or more integrated breakdown protection diodes in non-isolated power transistor devices and electronic apparatus, and methods for fabricating the devices.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Patrice M. Parris, Hubert M. Bode, Weize Chen, Richard J. DeSouza, Andreas Laudenbach, Kurt U. Neugebauer
  • Publication number: 20160013182
    Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region of the second conductivity type, and the diode circuit is connected between the isolation structure and the body region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Inventors: WEIZE CHEN, HUBERT M. BODE, RICHARD J. DE SOUZA, PATRICE M. PARRIS
  • Patent number: 9236472
    Abstract: A device includes a semiconductor substrate having a first conductivity type, a device isolating region in the semiconductor substrate, defining an active area, and having a second conductivity type, a body region in the active area and having the first conductivity type, and a drain region in the active area and spaced from the body region to define a conduction path of the device, the drain region having the second conductivity type. The device isolating region and the body region are spaced from one another to establish a first breakdown voltage lower than a second breakdown voltage in the conduction path.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: January 12, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris
  • Publication number: 20150380317
    Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a drain region of the second conductivity type, and the diode circuit is connected between the isolation structure and the drain region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Application
    Filed: September 4, 2015
    Publication date: December 31, 2015
    Inventors: WEIZE CHEN, HUBERT M. BODE, RICHARD J. DE SOUZA, PATRICE M. PARRIS
  • Publication number: 20150357324
    Abstract: Embodiments include methods of forming a semiconductor device having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a source region of the first conductivity type, and the diode circuit is connected between the isolation structure and the source region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: WEIZE CHEN, HUBERT M. BODE, RICHARD J. DE SOUZA, PATRICE M. PARRIS
  • Patent number: 9142554
    Abstract: Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a body region of the second conductivity type, and the diode circuit is connected between the isolation structure and the body region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s).
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: September 22, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Weize Chen, Hubert M. Bode, Richard J. De Souza, Patrice M. Parris