Abstract: A light-firable thyristor has two emitter layers and two base layers therebetween. One of the emitter layers comprises a plurality of partial layers one of which has a light-active semiconductor region. Each of the emitter layers has an additional region therein which in combination with the partial layer and the base layer adjacent the partial layer forms a gate controlled MIS structure for providing a controllable emitter short circuit path between each partial layer in the base layer adjacent therewith. The short circuit path is opened during initial device firing to provide increased sensitivity but which is shorted at other times to provide operational stability.

Abstract: A thyristor has a plurality of gate-controlled MIS-FET structures which serve the purpose of controlling emitter short-circuit paths with the objective of achieving stabilization short-circuits and, if necessary, quenching short-circuits. MIS-FET structures are disclosed which are effective, yet make economical use of surface area. In accordance with the invention, this is achieved since structures are provided at a plurality of recesses of the layered n-type emitter such that the electrode contacting the n-type emitter has recesses permitting it to contact the MIS-FET structures only on a border side.

Abstract: A thyristor has a semiconductor body exhibiting an n-p-n-p layer sequence with the small n-emitter and the p-emitter being contacted by first and second electrodes. The p-base layer has a third electrode connected to the first electrode through a first current source connectible with a first polarity. For triggering or quenching the thyristor as quickly and efficiently as possible, the n-base layer has a fourth electrode connected to the second electrode through a second connectible current source, the second current source being connectible to the fourth electrode with a second polarity opposite the first polarity.

Abstract: A thyristor has a semiconductor body which includes first and second base layers contacting one another, an n-emitter layer contacting the first base layer, a first electrode on the n-emitter layer, a p-emitter layer contacting the second base layer, a second electrode on the p-emitter layer, and controllable metal insulator-semiconductor emitter short circuit structures located at at least one boundary surface of the semiconductor body. Each of the short circuit structures includes first and second semiconductor regions of a first conductivity type, the first region contacting the first electrode, and an intermediate third semiconductor region of a second opposite conductivity type between the first and second regions and extending to the boundary surface. An insulated gate is carried over the third region.

Abstract: A thyristor structure has a semiconductor body which includes first and second base layers adjacent and contacting one another, a p-emitter layer contacting the first base layer, a first electrode contacting the p-emitter layer, an auxiliary, n-emitter layer contacting the second base layer, a second electrode contacting the auxiliary n-emitter layer and bridging the pn junction between the second base layer and the auxiliary n-emitter layer a n-emitter layer contacting the second base layer and a third electrode contacting the n-emitter layer. At least one current path which can be turned off comprises a metal-insulator-semiconductor structure located at the boundary surface of the semiconductor body which carries the second electrode.

Abstract: In a triac having a multilayer semiconductor body arranged between two electrodes, in which a first layer forms the p-base layer of a first thyristor and the p-emitter layer of a second thyristor, a second layer represents the n-base layers of both thyristors and a third layer forms the p-emitter layer of the first thyristor and the p-base layer of the second thyristor, and in which the n-emitter layer of the first thyristor is disposed in the first layer and an n-emitter of the second thyristor is disposed in the third layer, a gate-controlled MIS structures are provided which contain controllable emitter short circuit paths, the provision being at the n-emitter layer of the first thyristor and at the p-emitter layer of the second thyristor in the boundary area of both thyristors.

Abstract: A thyristor with gate-controlled emitter short-circuits designed as MIS structures of which a first part is switched off only for the duration of the ignition operation to form stabilization short-circuits, and a second, larger part is switched on only during quenching operation to form quenching short-circuits. The number of quenching short-circuits is established so that the emitter short-circuits effective during the quenching take up between 10% up to 80% of that part of the cross-sectional surface of the thyristor taken up by the totality of the emitter regions.

Abstract: A semiconductor component, which may be configured as a diac or triac or the like, has a semiconductor body comprising four layers of alternating conductivity type, in which an outer n-emitter carries a cathode, an outer p-emitter carries an anode, and two base layers are respectively adjacent and between the emitter layers. The anode and cathode respectively have terminals for an external circuit and a metal-insulator-semiconductor structure is disposed adjacent the n-emitter layer (p-emitter layer), the metal-insulator-semiconductor structure being provided with a gate electrode insulated from the boundary surface of the semiconductor body and representing a controllable emitter short circuit. A resistor is connected to the cathode (anode) and is connected in an external circuit in series with the cathode terminal (anode terminal).

Abstract: A thyristor which has outer emitter layers of opposite conductivity types and intermediate base layers of respective opposite conductivity types and metal-insulated-semiconductor emitter short circuit structures including a semiconductor region inserted in one of the outer emitters and doped opposite thereto and connected to the electrode carried thereby has an electrically conductive coating, connected to a terminal, carried on the boundary surface of the semiconductor body which contains the emitter layer having the MIS structure, a lateral zone of the conductive coating being insulated from the boundary surface and forming a gate electrode of the MIS structure and another zone which contacts the boundary surface and forms the trigger electrode.

Abstract: A region of a semiconductor surface intended for a metal contact is scanned with a closely packed sequence of intense laser light pulses so as to generate a disturbed surface layer and a metal layer is then applied and alloyed into the semiconductor surface. The invention is particularly useful with silicon crystal surfaces orientated in the <100> direction, which for the manufacture of semiconductor components, such as thyristors having controllable short-circuits generated by integrated field effect transistors, are provided on their back side with an aluminum contact or a metal silicide contact.