Abstract: A voltage multiplier is constructed using a series combination of capacitors and an associated switching circuit which provides for charging each capacitor in the series by sequentially connecting each capacitor to a d.c. input voltage. The d.c. input voltage of N volts is converted to an a.c. output voltage of peak-to-peak 2*(N+1) times the input voltage where N is the number of capacitors in the series. A pattern of sequential switching is chosen to generate a sequentially rising and falling voltage to form a half waveform. A commutator couples the half waveform to a pair of output terminals in an alternating polarity to form the completed a.c. output voltage.

Abstract: A triggering system (1) comprises a trigger device (4) to which a trigger input signal is supplied from an input (2) via parallel signal paths (6, 7, 8). One signal path (6) may be a direct connection, while the other signal paths (7, 8) include frequency division devices (10, 13). The signal paths (6, 7, 8) are selectively switched between the input and the trigger device under the control of frequency-dependent switching devices (16, 21) depending on the frequency of a signal obtained from an input signal at the input (2) of the triggering system. As a result, the useful frequency range of the triggering system (1) is extended up to much higher frequencies than would be determined solely by the bandwidth of the trigger device.