Patents by Inventor Huei-Siang WONG
Huei-Siang WONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11776887Abstract: The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a semiconductor structure, a conductive trace and a tenting structure. The semiconductor structure has a first surface, a second surface and a third surface extending between the first surface and the second surface, and the first surface, the second surface and the third surface define a through-silicon via recessed from the first surface. The conductive trace is disposed adjacent to the first surface, the second surface and the third surface of the semiconductor structure. The tenting structure covering the TSV of the semiconductor structure. A cavity is defined by the tenting structure and the TSV.Type: GrantFiled: May 7, 2021Date of Patent: October 3, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Wei Liu, Huei-Siang Wong
-
Patent number: 11600590Abstract: A semiconductor device and a semiconductor package including the same are provided. The semiconductor device includes a semiconductor element; a protective layer disposed adjacent to the surface of the semiconductor element, the protective layer defining an opening to expose the semiconductor element; a first bump disposed on the semiconductor element; and a second bump disposed onto the surface of the protective layer. The first bump has a larger cross-section surface area than the second bump.Type: GrantFiled: March 22, 2019Date of Patent: March 7, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Wei Liu, Huei-Siang Wong
-
Patent number: 11535509Abstract: A semiconductor package structure includes an electronic device having a first surface and an exposed region adjacent to the first surface; a dam disposed on the first surface and surrounding the exposed region of the electronic device; and a filter structure disposed on the dam.Type: GrantFiled: November 15, 2019Date of Patent: December 27, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Wei Liu, Huei-Siang Wong, Lu-Ming Lai
-
Publication number: 20220359362Abstract: The present disclosure provides a semiconductor package structure and a method of manufacturing the same. The semiconductor package structure includes a semiconductor structure, a conductive trace and a tenting structure. The semiconductor structure has a first surface, a second surface and a third surface extending between the first surface and the second surface, and the first surface, the second surface and the third surface define a through-silicon via recessed from the first surface. The conductive trace is disposed adjacent to the first surface, the second surface and the third surface of the semiconductor structure. The tenting structure covering the TSV of the semiconductor structure. A cavity is defined by the tenting structure and the TSV.Type: ApplicationFiled: May 7, 2021Publication date: November 10, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG
-
Patent number: 11437292Abstract: A sensing module, a semiconductor device package and a method of manufacturing the same are provided. The sensing module includes a sensing device, a first protection film and a second protection film. The sensing device has an active surface and a sensing region disposed adjacent to the active surface of the sensing device. The first protection film is disposed on the active surface of the sensing device and fully covers the sensing region. The second protection film is in contact with the first protection film and the active surface of the sensing device.Type: GrantFiled: October 11, 2019Date of Patent: September 6, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Wei Liu, Huei-Siang Wong, Lu-Ming Lai
-
Patent number: 11427466Abstract: A semiconductor package structure includes an electronic device having an exposed region adjacent to a first surface, a dam surrounding the exposed region of the semiconductor die and disposed on the first surface, the dam having a top surface away from the first surface, an encapsulant encapsulating the first surface of the electronic device, exposing the exposed region of the electronic device. A surface of the dam is retracted from a top surface of the encapsulant. A method for manufacturing the semiconductor package structure is also provided.Type: GrantFiled: July 19, 2019Date of Patent: August 30, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Wei Liu, Huei-Siang Wong, Lu-Ming Lai
-
Publication number: 20220230915Abstract: An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a substrate, a conductive trace, a passivation layer and an upper wiring. The conductive trace is disposed over the substrate. The conductive trace includes a body portion disposed on the substrate, and a cap portion disposed on the body portion, and the cap portion is wider than the body portion. The passivation layer covers the conductive trace. The upper wiring is disposed on the passivation layer and electrically connected to the cap portion of the conductive trace through an opening of the passivation layer.Type: ApplicationFiled: January 15, 2021Publication date: July 21, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG
-
Publication number: 20210305441Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate including a sensing region and a first transparent layer disposed over the sensing region. The first transparent layer has a first surface facing the sensing region, a second surface opposite to the first surface of the first transparent layer, and a lateral surface extending between the first surface and the second surface of the first transparent layer. The semiconductor device package further includes a first light blocking layer disposed on the first transparent layer. The first light blocking layer defines a plurality of apertures. At least a portion of the first light blocking layer extends over the lateral surface of the first transparent layer. A semiconductor package assembly is also disclosed.Type: ApplicationFiled: March 31, 2020Publication date: September 30, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG
-
Publication number: 20210210536Abstract: A semiconductor package includes a semiconductor device and a second substrate. The semiconductor device is disposed on, and electrically connected to, the second substrate. The semiconductor device includes a first substrate and a multi-layered structure. The multi-layered structure is disposed on a top surface of the first substrate and a layer of the multi-layered structure extends outwardly beyond a lateral edge of a topmost surface of the multi-layered structure.Type: ApplicationFiled: January 3, 2020Publication date: July 8, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG
-
Publication number: 20210147219Abstract: A semiconductor package structure includes an electronic device having a first surface and an exposed region adjacent to the first surface; a dam disposed on the first surface and surrounding the exposed region of the electronic device; and a filter structure disposed on the dam.Type: ApplicationFiled: November 15, 2019Publication date: May 20, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG, Lu-Ming LAI
-
Publication number: 20210111083Abstract: A sensing module, a semiconductor device package and a method of manufacturing the same are provided. The sensing module includes a sensing device, a first protection film and a second protection film. The sensing device has an active surface and a sensing region disposed adjacent to the active surface of the sensing device. The first protection film is disposed on the active surface of the sensing device and fully covers the sensing region. The second protection film is in contact with the first protection film and the active surface of the sensing device.Type: ApplicationFiled: October 11, 2019Publication date: April 15, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG, Lu-Ming LAI
-
Publication number: 20210017018Abstract: A semiconductor package structure includes an electronic device having an exposed region adjacent to a first surface, a dam surrounding the exposed region of the semiconductor die and disposed on the first surface, the dam having a top surface away from the first surface, an encapsulant encapsulating the first surface of the electronic device, exposing the exposed region of the electronic device. A surface of the dam is retracted from a top surface of the encapsulant. A method for manufacturing the semiconductor package structure is also provided.Type: ApplicationFiled: July 19, 2019Publication date: January 21, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG, Lu-Ming LAI
-
Patent number: 10818627Abstract: An electronic component includes a die, a first protective layer, a second protective layer, a first conductive pillar and a second conductive pillar. The die includes a conductive pad. The first protective layer is disposed on the die. The first protective layer defines a first opening to expose the conductive pad of the die. The second protective layer is disposed on the first protective layer. The second protective layer defines a second opening and a first recess. The second opening exposes the conductive pad of the die. The first conductive pillar is disposed within the second opening and electrically connected to the conductive pad. The second conductive pillar is disposed within the first recess. A height of the first conductive pillar is substantially equal to a height of the second conductive pillar. A bottom surface of the first recess is disposed between a top surface of the first protective layer and a top surface of the second protective layer.Type: GrantFiled: August 29, 2017Date of Patent: October 27, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Wei Liu, Huei-Siang Wong
-
Publication number: 20200303334Abstract: A semiconductor device and a semiconductor package including the same are provided. The semiconductor device includes a semiconductor element; a protective layer disposed adjacent to the surface of the semiconductor element, the protective layer defining an opening to expose the semiconductor element; a first bump disposed on the semiconductor element; and a second bump disposed onto the surface of the protective layer. The first bump has a larger cross-section surface area than the second bump.Type: ApplicationFiled: March 22, 2019Publication date: September 24, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG
-
Publication number: 20190067230Abstract: An electronic component includes a die, a first protective layer, a second protective layer, a first conductive pillar and a second conductive pillar. The die includes a conductive pad. The first protective layer is disposed on the die. The first protective layer defines a first opening to expose the conductive pad of the die. The second protective layer is disposed on the first protective layer. The second protective layer defines a second opening and a first recess. The second opening exposes the conductive pad of the die. The first conductive pillar is disposed within the second opening and electrically connected to the conductive pad. The second conductive pillar is disposed within the first recess. A height of the first conductive pillar is substantially equal to a height of the second conductive pillar. A bottom surface of the first recess is disposed between a top surface of the first protective layer and a top surface of the second protective layer.Type: ApplicationFiled: August 29, 2017Publication date: February 28, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Wei LIU, Huei-Siang WONG