Patents by Inventor Huey-Chiang Liou

Huey-Chiang Liou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8513111
    Abstract: A semiconductor structure may be covered with a thermally decomposing film. That film may then be covered by a sealing cover. Subsequently, the thermally decomposing material may be decomposed, forming a cavity.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: August 20, 2013
    Assignee: Intel Corporation
    Inventors: Robert P. Meagley, Kevin P. O'Brien, Tian-An Chen, Michael D. Goodner, James Powers, Huey-Chiang Liou
  • Patent number: 7867687
    Abstract: Embodiments of the invention provide a non-chemically amplified photoresist, which results in reduced line wide roughness (LWR). In accordance with one embodiment the photoresist includes a developer-soluble resin (DSR) and a photoactive compound (PAC). For one embodiment of the invention, the even distribution of the PAC within the DSR results in reduced acid diffusion thus reducing LWR. Prior to exposure to the light source, the PAC inhibits solubility of the DSR in the developer. Upon exposure the PAC converts to acid to promote solubility of the DSR. The even distribution of the PAC within the photoresist results in reduced LWR and a reduction in defects. For one embodiment the photoresist is applied in the EUV technology (e.g., wavelength is 13.4 nm). For such an embodiment the LWR may be reduced to less than 1.5 nm allowing for effective fabrication of devices having feature sizes of approximately 15 nm.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: January 11, 2011
    Assignee: Intel Corporation
    Inventors: Wang Yueh, Huey-Chiang Liou, Hai Deng, Hok-Kin Choi
  • Patent number: 7469443
    Abstract: In a formulation of a wafer cleaning brush, forming a polymer solution with a plurality of nano-scale porogens or with a synthetic pore forming agent and curing the polymer solution to form a porous polymeric material.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: December 30, 2008
    Assignee: Intel Corporation
    Inventors: Huey-Chiang Liou, Alexander Tregub, Mansour Moinpour
  • Publication number: 20080220213
    Abstract: A method for forming a zeolite-carbon doped oxide (CDO) composite dielectric material is herein described. Zeolite particles may be dispersed in a solvent. The zeolite solvent solution may then be deposited on an underlying layer, such as a wafer or other dielectric layer. At least some solvent may then be removed to form a zeolite film. A CDO may then be deposited in the zeolite film to form a zeolite-CDO composite film/dielectric. The Zeolite-CDO composite film/dielectric may then be calcinated to form a solid phase zeolite-CDO composite dielectric.
    Type: Application
    Filed: October 26, 2007
    Publication date: September 11, 2008
    Inventors: Hai Deng, Huey-Chiang Liou
  • Patent number: 7391501
    Abstract: Compositions for immersion liquid materials and associated immersion lithography systems and techniques. Examples of polymer or oligomer-based immersion liquids are described to exhibit superior material properties for immersion lithography in comparison with water and some other commonly-used immersion liquids. In addition, certain material additives may be added to water and water-based immersion liquids to improve the performance of the immersion liquids in immersion lithography.
    Type: Grant
    Filed: January 22, 2004
    Date of Patent: June 24, 2008
    Assignee: Intel Corporation
    Inventors: Hai Deng, Yueh Wang, Huey-Chiang Liou, Hok-Kin Choi, Robert M. Meagley, Ernisse Putna
  • Patent number: 7303985
    Abstract: A method for forming a zeolite-carbon doped oxide (CDO) composite dielectric material is herein described. Zeolite particles may be dispersed in a solvent. The zeolite solvent solution may then be deposited on an underlying layer, such as a wafer of other dielectric layer. At least some solvent may then be removed to form a zeolite film. A CDO may then be deposited in the zeolite film to form a zeolite-CDO composite film/dielectric. The zeolite-CDO composite film/dielectric may then be calcinated to form a solid phase zeolite-CDO composite dilectric.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: December 4, 2007
    Assignee: Intel Corporation
    Inventors: Hai Deng, Huey-Chiang Liou
  • Publication number: 20060255432
    Abstract: A semiconductor structure may be covered with a thermally decomposing film. That film may then be covered by a sealing cover. Subsequently, the thermally decomposing material may be decomposed, forming a cavity.
    Type: Application
    Filed: July 12, 2006
    Publication date: November 16, 2006
    Inventors: Robert Meagley, Kevin O'Brien, Tian-An Chen, Michael Goodner, James Powers, Huey-Chiang Liou
  • Patent number: 7125793
    Abstract: A method of forming an opening in a disclosed ILD is described. The ILD in one embodiment includes a matrix material and a photosensitive porogen. Hard sidewalls are formed in the ILD allowing a thin barrier layer to be used in a dual damascene copper and porous low-k without pore sealing steps.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: October 24, 2006
    Assignee: Intel Corporation
    Inventors: Huey-Chiang Liou, Wang Yueh
  • Publication number: 20060151003
    Abstract: In a formulation of a wafer cleaning brush, forming a polymer solution with a plurality of nano-scale porogens or with a synthetic pore forming agent and curing the polymer solution to form a porous polymeric material.
    Type: Application
    Filed: January 10, 2005
    Publication date: July 13, 2006
    Inventors: Huey-Chiang Liou, Alexander Tregub, Mansour Moinpour
  • Patent number: 7071125
    Abstract: A method including introducing a precursor in the presence of a circuit substrate, and forming a film including a reaction product of the precursor on the substrate, wherein the precursor includes a molecule comprising a primary species of the film and a modifier. A method including introducing a precursor in the presence of a circuit substrate, the precursor including a primary species and a film modifier as a single source, and forming a film on the circuit substrate. An apparatus including a semiconductor substrate, and a film on a surface of the semiconductor substrate, the film including a reaction product of a precursor including a molecule comprising a primary species and a modifier.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: July 4, 2006
    Assignee: Intel Corporation
    Inventors: Michael L. McSwiney, Huey-Chiang Liou, Michael D. Goodner, Robert E. Leet, Robert P. Meagley
  • Publication number: 20060063394
    Abstract: A method including introducing a precursor in the presence of a circuit substrate, and forming a film including a reaction product of the precursor on the substrate, wherein the precursor includes a molecule comprising a primary species of the film and a modifier. A method including introducing a precursor in the presence of a circuit substrate, the precursor including a primary species and a film modifier as a single source, and forming a film on the circuit substrate. An apparatus including a semiconductor substrate, and a film on a surface of the semiconductor substrate, the film including a reaction product of a precursor including a molecule comprising a primary species and a modifier.
    Type: Application
    Filed: September 22, 2004
    Publication date: March 23, 2006
    Inventors: Michael McSwiney, Huey-Chiang Liou, Michael Goodner, Robert Leet, Robert Meagley
  • Patent number: 6995073
    Abstract: Method and structure for integrating conductive and dielectric materials in a microelectronic structure having air gaps are disclosed. Certain embodiments of the invention comprise isolating dielectric layers from conductive layers using an etch stop layer to facilitate controlled removal of portions of the dielectric layers and formation of air gaps or voids. Capping and peripheral structural layers may be incorporated to increase the structural integrity of the integration subsequent to removal of sacrificial material.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: February 7, 2006
    Assignee: Intel Corporation
    Inventor: Huey-Chiang Liou
  • Publication number: 20050164502
    Abstract: Compositions for immersion liquid materials and associated immersion lithography systems and techniques. Examples of polymer or oligomer-based immersion liquids are described to exhibit superior material properties for immersion lithography in comparison with water and some other commonly-used immersion liquids. In addition, certain material additives may be added to water and water-based immersion liquids to improve the performance of the immersion liquids in immersion lithography.
    Type: Application
    Filed: January 22, 2004
    Publication date: July 28, 2005
    Inventors: Hai Deng, Yueh Wang, Huey-Chiang Liou, Hok-Kin Choi, Robert Meagley, Ernisse Putna
  • Publication number: 20050133920
    Abstract: A method of forming an opening in a disclosed ILD is described. The ILD in one embodiment includes a matrix material and a photosensitive porogen. Hard sidewalls are formed in the ILD allowing a thin barrier layer to be used in a dual damascene copper and porous low-k without pore sealing steps.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventors: Huey-Chiang Liou, Wang Yueh
  • Publication number: 20050107242
    Abstract: A method for forming a zeolite-carbon doped oxide (CDO) composite dielectric material is herein described. Zeolite particles may be dispersed in a solvent. The zeolite solvent solution may then be deposited on an underlying layer, such as a wafer of other dielectric layer. At least some solvent may then be removed to form a zeolite film. A CDO may then be deposited in the zeolite film to form a zeolite-CDO composite film/dielectric. The zeolite-CDO composite film/dielectric may then be calcinated to form a solid phase zeolite-CDO composite dilectric.
    Type: Application
    Filed: November 17, 2003
    Publication date: May 19, 2005
    Inventors: Hai Deng, Huey-Chiang Liou
  • Publication number: 20050084793
    Abstract: Embodiments of the invention provide a non-chemically amplified photoresist, which results in reduced line wide roughness (LWR). In accordance with one embodiment the photoresist includes a developer-soluble resin (DSR) and a photoactive compound (PAC). For one embodiment of the invention, the even distribution of the PAC within the DSR results in reduced acid diffusion thus reducing LWR. Prior to exposure to the light source, the PAC inhibits solubility of the DSR in the developer. Upon exposure the PAC converts to acid to promote solubility of the DSR. The even distribution of the PAC within the photoresist results in reduced LWR and a reduction in defects. For one embodiment the photoresist is applied in the EUV technology (e.g., wavelength is 13.4 nm). For such an embodiment the LWR may be reduced to less than 1.5 nm allowing for effective fabrication of devices having feature sizes of approximately 15 nm.
    Type: Application
    Filed: October 15, 2003
    Publication date: April 21, 2005
    Inventors: Wang Yueh, Huey-Chiang Liou, Hai Deng, Hok-Kin Choi
  • Patent number: 6864192
    Abstract: A Langmuir-Blodgett film may be utilized as a chemically amplified photoresist layer. Langmuir-Blodgett films have highly vertically oriented structures which may be effective in reducing line edge or line width roughness in chemically amplified photoresists.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: March 8, 2005
    Assignee: Intel Corporation
    Inventors: Huey-Chiang Liou, Hai Deng, Wang Yueh, Hok-Kin Choi
  • Publication number: 20050012219
    Abstract: Method and structure for integrating conductive and dielectric materials in a microelectronic structure having air gaps are disclosed. Certain embodiments of the invention comprise isolating dielectric layers from conductive layers using an etch stop layer to facilitate controlled removal of portions of the dielectric layers and formation of air gaps or voids. Capping and peripheral structural layers may be incorporated to increase the structural integrity of the integration subsequent to removal of sacrificial material.
    Type: Application
    Filed: July 16, 2003
    Publication date: January 20, 2005
    Inventor: Huey-Chiang Liou
  • Publication number: 20040145030
    Abstract: A semiconductor structure may be covered with a thermally decomposing film. That film may then be covered by a sealing cover. Subsequently, the thermally decomposing material may be decomposed, forming a cavity.
    Type: Application
    Filed: January 28, 2003
    Publication date: July 29, 2004
    Inventors: Robert P. Meagley, Kevin P. O'Brien, Tian-An Chen, Michael D. Goodner, James Powers, Huey-Chiang Liou