Patents by Inventor Huey Ming Chong

Huey Ming Chong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8692380
    Abstract: A method of manufacture of an integrated circuit system includes: forming reticle data; detecting a sub-geometry, a singularity, or a combination thereof in the reticle data; applying a unit cell, a patch cell, or a combination thereof for removing the sub-geometry, the singularity, or the combination thereof from the reticle data; and fabricating an integrated circuit from the reticle data.
    Type: Grant
    Filed: October 22, 2012
    Date of Patent: April 8, 2014
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Soon Yoeng Tan, Huey Ming Chong, Byoung-Il Choi, Soo Muay Goh
  • Patent number: 8293546
    Abstract: A method of manufacture of an integrated circuit system includes: forming reticle data; detecting a sub-geometry, a singularity, or a combination thereof in the reticle data; applying a unit cell, a patch cell, or a combination thereof for removing the sub-geometry, the singularity, or the combination thereof from the reticle data; and fabricating an integrated circuit from the reticle data.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: October 23, 2012
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Soon Yoeng Tan, Huey Ming Chong, Byoung-Il Choi, Soo Muay Goh
  • Patent number: 8057968
    Abstract: A method of making a mask is disclosed. The method includes providing a first and a second mask layers and disposing a first phase shift region on the first mask layer. A second phase shift region is disposed on the second mask layer, wherein the first and second phase shift regions are out of phase. A continuous unit cell is formed in the first phase shift region. The unit cell comprises a center section and distinct extension sections. The extension sections are contiguous to and extend outwards from the center section. The distinct extension sections have a same width as the center section. The second phase shift region is adjacent to the unit cell in the first phase shift region.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: November 15, 2011
    Assignee: Globalfoundries Singapore Pte. Ltd.
    Inventors: Sia Kim Tan, Soon Yoeng Tan, Qun Ying Lin, Huey Ming Chong, Liang Choo Hsia
  • Patent number: 8048588
    Abstract: A method and structure for removing side lobes is provided by positioning first and second radiation transparent regions of respective first and second phases at a first plane with the first and second phases being substantially out of phase. Further, positioning the first and the second region to cause radiation at a second plane to be neutralized in a first region, not to be neutralized in a second region, and to have a side lobe in a third region. Further, positioning a non-transparent region at the first plane to assure radiation at the second plane to be neutralized in the first region and positioning a third radiation transparent region of the first or second phase at the first plane to neutralize the side lobes in the third region at the second plane.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: November 1, 2011
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Sia Kim Tan, Soon Yoeng Tan, Qunying Lin, Huey Ming Chong, Liang-Choo Hsia
  • Publication number: 20100196805
    Abstract: A method of making a mask is disclosed. The method includes providing a first and a second mask layers and disposing a first phase shift region on the first mask layer. A second phase shift region is disposed on the second mask layer, wherein the first and second phase shift regions are out of phase. A continuous unit cell is formed in the first phase shift region. The unit cell comprises a center section and distinct extension sections. The extension sections are contiguous to and extend outwards from the center section. The distinct extension sections have a same width as the center section. The second phase shift region is adjacent to the unit cell in the first phase shift region.
    Type: Application
    Filed: January 28, 2010
    Publication date: August 5, 2010
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
    Inventors: Sia Kim TAN, Soon Yoeng TAN, Qun Ying LIN, Huey Ming CHONG, Liang Choo HSIA
  • Publication number: 20090309192
    Abstract: A method of manufacture of an integrated circuit system includes: forming reticle data; detecting a sub-geometry, a singularity, or a combination thereof in the reticle data; applying a unit cell, a patch cell, or a combination thereof for removing the sub-geometry, the singularity, or the combination thereof from the reticle data; and fabricating an integrated circuit from the reticle data.
    Type: Application
    Filed: June 3, 2009
    Publication date: December 17, 2009
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
    Inventors: Soon Yoeng Tan, Huey Ming Chong, Byoung-IL Choi, Soo Muay Goh
  • Patent number: 7556891
    Abstract: A method for forming a contact hole unit cell is provided. A light transparent contact hole region of a first phase is positioned at a first plane. A light transparent phase-shifting region of a second phase is positioned at the first plane, the second phase being substantially out of phase with the first phase. The phase-shifting region substantially surrounds the contact hole region. A light transparent border region is positioned at the first plane outside the phase-shifting region. The border region has a phase substantially the same as that of the contact hole region. A chrome pad is positioned at the first plane outside and contacting at least a portion of the border region. The contact hole region, the phase-shifting region, the border region, and the chrome pad are positioned to cause light from the first plane to be reinforcing in a target contact hole configuration on a second plane and to be substantially neutralizing outside the target contact hole configuration on the second plane.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: July 7, 2009
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Soon Yoeng Tan, Sia Kim Tan, Qunying Lin, Huey Ming Chong, Liang-Choo Hsia
  • Patent number: 7288366
    Abstract: A reticle structure and a method of forming a photoresist profile on a substrate using the reticle having a multi-level profile. The reticle comprises (1) a transparent substrate, (2) a partially transmitting 180 degree phase shift film overlying predetermined areas of the transparent substrate to transmit approximately 20 to 70% of incident light, and (3) an opaque film overlying the predetermined areas of the partially transmitting 180 degree phase shift film. The method comprises the following steps: a) depositing a photoresist film over the substrate; b) directing light to the photoresist film through the reticle, and c) developing the photoresist film to form an opening in the resist layer where light only passed thru the substrate, and to remove intermediate thickness of the photoresist film, in the areas where the light passed through the partially transmitting 180 degree phase shift film. In an aspect, the photoresist film is comprised of a lower photoresist layer and an upper photoresist layer.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: October 30, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Sia Kim Tan, Qun Ying Lin, Soon Yoeng Tan, Huey Ming Chong
  • Patent number: 7224060
    Abstract: A method of manufacturing an integrated circuit provides a substrate having a semiconductor device, and includes forming an intermetal dielectric layer over the substrate and the semiconductor device. A metal wire is formed above the semiconductor device and in contact therewith and a passivation layer is formed over the intermetal dielectric layer. A bond pad is formed connected to the metal wire. A protective moat, with sidewall passivation layer, is formed through the passivation layer and the intermetal dielectric layer, and is located between the metal wire and an outside edge of the integrated circuit.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: May 29, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Fan Zhang, Kho Liep Chok, Tae Jong Lee, Xiaomei Bu, Meng Luo, Chian Yuh Sin, Yee Mei Foong, Luona Goh, Liang Choo Hsia, Huey Ming Chong
  • Patent number: 7014962
    Abstract: A structure, a method of fabricating and a method of using a phase shift mask (PSM) having a first phase shifted section, a half tone section, and a second phase shifted section. The first phase shift section and the half tone section are shifted 180 degrees with the second phase shift region. Embodiments provide for (1) a half tone, single trench alternating phase shift mask and (2) a half tone, dual trench alternating phase shift mask. The half tone region provides advantages over conventional alternating phase shift masks.
    Type: Grant
    Filed: September 13, 2003
    Date of Patent: March 21, 2006
    Assignee: Chartered Semiconductor Manufacturing, LTD
    Inventors: Qun Ying Lin, Sia Kim Tan, Soon Yoeng Tan, Huey Ming Chong