Patents by Inventor Huey-Ru TSAI

Huey-Ru TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240320451
    Abstract: Automatic generation of intelligent content is created using a system of computers including a user device and a cloud-based component that processes the user information. The system performs a process that includes receiving an input document and parsing the input document to generate inputs for a natural language generation model using a text analysis model. The natural language generation model generates one or more candidate presentation scripts based on the inputs. A presentation script is selected from the candidate presentation scripts and displayed. A text-to-speech model may be used to generate a synthesized audio presentation of the presentation script. A final presentation may be generated that includes a visual display of the input document and the corresponding audio presentation in sync with the visual display.
    Type: Application
    Filed: June 6, 2024
    Publication date: September 26, 2024
    Inventors: Ji LI, Konstantin SELESKEROV, Huey-Ru TSAI, Muin Barkatali MOMIN, Ramya TRIDANDAPANI, Sindhu Vigasini JAMBUNATHAN, Amit SRIVASTAVA, Derek Martin JOHNSON, Gencheng WU, Sheng ZHAO, Xinfeng CHEN, Bohan LI
  • Patent number: 12032922
    Abstract: Automatic generation of intelligent content is created using a system of computers including a user device and a cloud-based component that processes the user information. The system performs a process that includes receiving an input document and parsing the input document to generate inputs for a natural language generation model using a text analysis model. The natural language generation model generates one or more candidate presentation scripts based on the inputs. A presentation script is selected from the candidate presentation scripts and displayed. A text-to-speech model may be used to generate a synthesized audio presentation of the presentation script. A final presentation may be generated that includes a visual display of the input document and the corresponding audio presentation in sync with the visual display.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: July 9, 2024
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Ji Li, Konstantin Seleskerov, Huey-Ru Tsai, Muin Barkatali Momin, Ramya Tridandapani, Sindhu Vigasini Jambunathan, Amit Srivastava, Derek Martin Johnson, Gencheng Wu, Sheng Zhao, Xinfeng Chen, Bohan Li
  • Publication number: 20220366153
    Abstract: Automatic generation of intelligent content is created using a system of computers including a user device and a cloud-based component that processes the user information. The system performs a process that includes receiving an input document and parsing the input document to generate inputs for a natural language generation model using a text analysis model. The natural language generation model generates one or more candidate presentation scripts based on the inputs. A presentation script is selected from the candidate presentation scripts and displayed. A text-to-speech model may be used to generate a synthesized audio presentation of the presentation script. A final presentation may be generated that includes a visual display of the input document and the corresponding audio presentation in sync with the visual display.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 17, 2022
    Inventors: Ji LI, Konstantin SELESKEROV, Huey-Ru TSAI, Muin Barkatali MOMIN, Ramya TRIDANDAPANI, Sindhu Vigasini JAMBUNATHAN, Amit SRIVASTAVA, Derek Martin JOHNSON, Gencheng WU, Sheng ZHAO, Xinfeng CHEN, Bohan LI
  • Patent number: 11341331
    Abstract: An intelligent speech assistant receives information collected while a user is speaking. The information can comprise speech data, vision data, or both, where the speech data is from the user speaking and the vision data is of the user while speaking. The assistant evaluates the speech data against a script which can contain information that the user should speak, information that the user should not speak, or both. The assistant collects instances where the user utters phrases that match the script or instances where the user utters phrases that do not match the script, depending on whether phases should or should not be spoken. The assistant evaluates vision data to identify gestures, facial expressions, and/or emotions of the user. Instances where the gestures, facial expressions, and/or emotions are not appropriate to the context are flagged. Real-time prompts and/or a summary is presented to the user as feedback.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: May 24, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Huakai Liao, Priyanka Vikram Sinha, Kevin Dara Khieu, Derek Martin Johnson, Siliang Kang, Huey-Ru Tsai, Amit Srivastava
  • Publication number: 20210103635
    Abstract: An intelligent speech assistant receives information collected while a user is speaking. The information can comprise speech data, vision data, or both, where the speech data is from the user speaking and the vision data is of the user while speaking. The assistant evaluates the speech data against a script which can contain information that the user should speak, information that the user should not speak, or both. The assistant collects instances where the user utters phrases that match the script or instances where the user utters phrases that do not match the script, depending on whether phases should or should not be spoken. The assistant evaluates vision data to identify gestures, facial expressions, and/or emotions of the user. Instances where the gestures, facial expressions, and/or emotions are not appropriate to the context are flagged. Real-time prompts and/or a summary is presented to the user as feedback.
    Type: Application
    Filed: October 4, 2019
    Publication date: April 8, 2021
    Inventors: Huakai LIAO, Priyanka Vikram SINHA, Kevin Dara KHIEU, Derek Martin JOHNSON, Siliang KANG, Huey-Ru TSAI, Amit SRIVASTAVA
  • Publication number: 20210065582
    Abstract: A method and system for speech rehearsal assistant during a presentation rehearsal includes receiving audio data from a speech rehearsal session over a network, receiving a transcript for the audio data, the transcript including a plurality of words spoken during the speech rehearsal session, calculating a real time speaking rate for the speech rehearsal session, determining if the speaking rate is within a threshold range, detecting utterance of a filler phrase or sound during the speech rehearsal session using at least in part a machine learning model trained for identifying filler phrases and sounds in a text, and upon determining the speaking rate falls outside the threshold range or detecting the utterance of the filler phrase or sound, enabling real time display of a notification on a display device.
    Type: Application
    Filed: September 4, 2019
    Publication date: March 4, 2021
    Applicant: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Huakai LIAO, Kevin Dara KHIEU, Amit SRIVASTAVA, Huey-Ru TSAI, Gregory Alexander DEPAUL, John Christian LEONE, Hemin Kiran Merchant
  • Patent number: 10446489
    Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: October 15, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ko-Wei Lin, Hung-Miao Lin, Chun-Ling Lin, Ying-Lien Chen, Huei-Ru Tsai, Sheng-Yi Su
  • Publication number: 20190067184
    Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
    Type: Application
    Filed: October 25, 2018
    Publication date: February 28, 2019
    Inventors: Ko-Wei Lin, Hung-Miao Lin, Chun-Ling Lin, Ying-Lien Chen, Huei-Ru Tsai, Sheng-Yi Su
  • Patent number: 10153231
    Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: December 11, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ko-Wei Lin, Hung-Miao Lin, Chun-Ling Lin, Ying-Lien Chen, Huei-Ru Tsai, Sheng-Yi Su
  • Patent number: 10079177
    Abstract: A method is provided for forming copper material over a substrate. The method includes forming a barrier layer over a substrate. Then, a depositing-soaking-treatment (DST) process is performed over the barrier layer. A copper layer is formed on the cobalt layer. The DST process includes depositing a cobalt layer on the barrier layer. Then, the cobalt layer is soaked with H2 gas at a first pressure. The cobalt layer is treated with a H2 plasma at a second pressure. The second pressure is lower than the first pressure.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: September 18, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Ko-Wei Lin, Ying-Lien Chen, Chun-Ling Lin, Huei-Ru Tsai, Hung-Miao Lin, Sheng-Yi Su, Tzu-Hao Liu
  • Publication number: 20180261537
    Abstract: An interconnect structure includes a dielectric layer and a conductor embedded in the dielectric layer. A top surface of the conductor is flush with a top surface of the dielectric layer. A cobalt cap layer is deposited on the top surface of the conductor. A nitrogen-doped cobalt layer is disposed on the cobalt cap layer.
    Type: Application
    Filed: March 22, 2017
    Publication date: September 13, 2018
    Inventors: Ko-Wei Lin, Hung-Miao Lin, Chun-Ling Lin, Ying-Lien Chen, Huei-Ru Tsai, Sheng-Yi Su
  • Publication number: 20160276215
    Abstract: A method for manufacturing a semiconductor device is provided. The method comprises steps as follows. At least one trench is provided in a low-k dielectric layer on a substrate. The trench is filled with a copper (Cu) film. Pure cobalt (Co) is deposited on a surface of the Cu film by introducing a flow of a carrier gas carrying a Co-containing precursor and a reducing agent onto the surface of the Cu film. The flowrate of the flow is within a range from 5 to 19 sccm.
    Type: Application
    Filed: March 18, 2015
    Publication date: September 22, 2016
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: PEI-TING LEE, GUO-WEI CHEN, CHUN-LING LIN, CHI-MAO HSU, CHING-WEI HSU, HUEI-RU TSAI, JIA-RONG LI, SHANG NAN CHOU, PO CHIH WU
  • Patent number: 9412653
    Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: August 9, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Chun-Ling Lin, Huei-Ru Tsai, Ching-Wei Hsu, Chin-Fu Lin, Hsin-Yu Chen
  • Publication number: 20150340280
    Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
    Type: Application
    Filed: August 4, 2015
    Publication date: November 26, 2015
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Chun-Ling Lin, Huei-Ru Tsai, Ching-Wei Hsu, Chin-Fu Lin, Hsin-Yu Chen
  • Patent number: 9136170
    Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: September 15, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Chun-Ling Lin, Huei-Ru Tsai, Ching-Wei Hsu, Chin-Fu Lin, Hsin-Yu Chen
  • Patent number: 9012324
    Abstract: A through silicon via process includes the following steps. A substrate having a front side and a back side is provided. A passivation layer is formed on the back side of the substrate. An oxide layer is formed on the passivation layer.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: April 21, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Ching-Wei Hsu, Szu-Hao Lai, Huei-Ru Tsai, Tsai-Yu Wen, Ching-Li Yang, Chien-Li Kuo
  • Publication number: 20150093893
    Abstract: In a process of forming a seed layer, particularly in a vertical trench or via, a semiconductor substrate having a dielectric structure and a hard mask structure thereon is provided. An opening is formed in the hard mask structure, and a trench or via is formed in the dielectric structure in communication with the opening, wherein an area of the opening is greater than that of an entrance of the trench or via. A seed layer is then deposited in the trench or via through the opening, and then subjected to a reflow process.
    Type: Application
    Filed: October 2, 2013
    Publication date: April 2, 2015
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Yi-Fang Tao, Ching-Wei Hsu, Hsin-Yu Chen, Tsun-Min Cheng, Yung-Chien Kung, Chi-Mao Hsu, Guo-Wei Chen, Huei-Ru Tsai, Jia-Rong Li
  • Publication number: 20140057434
    Abstract: A through silicon via process includes the following steps. A substrate having a front side and a back side is provided. A passivation layer is formed on the back side of the substrate. An oxide layer is formed on the passivation layer.
    Type: Application
    Filed: August 24, 2012
    Publication date: February 27, 2014
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Ching-Wei Hsu, Szu-Hao Lai, Huei-Ru Tsai, Tsai-Yu Wen, Ching-Li Yang, Chien-Li Kuo
  • Publication number: 20130320537
    Abstract: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located on the buffer layer and fills the recess, wherein the contact surface between the conductive layer and the buffer layer is smoother than the contact surface between the buffer layer and the barrier layer. Moreover, a through silicon via process forming said through silicon via structure is also provided.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 5, 2013
    Inventors: Jia-Jia Chen, Chi-Mao Hsu, Tsun-Min Cheng, Chun-Ling Lin, Huei-Ru Tsai, Ching-Wei Hsu, Chin-Fu Lin, Hsin-Yu Chen