Abstract: The FAULT TOLERANT GATE ARRAY USING DUPLICATION ONLY shown here renders AND-drives-OR, and OR-drives-AND, gate arrays as fault tolerant as when triplicated, but does so by only duplicating the array. A test input is added to each of gates of the bottom tier of the two arrays. When a test signal is applied, the same output should be produced by both arrays. This output should be the same as an expected test output, which is known in advance. When the test signal is withdrawn, the two arrays should continue to produce the same output as each other, although it may or may not be the same as the output under test. If any of these three conditions is not met, the failure may be used to determine the correct output, the failed array, and the nature of the failure.

Abstract: An apparatus and method for providing self-checking voting logic for fault tolerant computing applications. The apparatus comprises a voting circuitry for producing a voting circuit output signal based upon a majority of triplicated logic output signals, unanimous circuitry for producing a unanimous circuit output signal that represents whether or not all of said triplicated logic output signal values are equal or not and self-checking circuitry for monitoring the validity of operation of the voting and the unanimous circuitry as well as said self-checking circuitry itself.