Patents by Inventor Hugh McEvoy Walsh

Hugh McEvoy Walsh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240111667
    Abstract: Aspects of the disclosure are directed to a memory allocator for assigning contiguous memory space for data packets in on-chip memory of a network interface card. The memory allocator includes a plurality of sub-allocators that correspond to a structure of entries, where each entry represents a quanta of memory allocation. The sub-allocators are organized in decreasing size in the memory allocator based on the amount of memory quanta they can allocate.
    Type: Application
    Filed: September 28, 2022
    Publication date: April 4, 2024
    Inventors: Abhishek Agarwal, Srinivas Vaduvatha, Weiwei Jiang, Hugh McEvoy Walsh, Weihuang Wang, Jiazhen Zheng, Ajay Venkatesan
  • Patent number: 11914647
    Abstract: A hash table system, including a plurality of hash tables, associated with respective hash functions, for storing key-value pairs; an overflow memory for storing key-value pairs moved from the hash tables due to collision; and an arbiter for arbitrating among commands including update commands, match commands, and rehash commands, wherein for each system clock cycle, the arbiter selects as a selected command one of an update command, a match command, or a rehash command, and wherein the hash table system completes execution of each selected command within a bounded number of system clock cycles.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: February 27, 2024
    Assignee: Google LLC
    Inventors: Weiwei Jiang, Srinivas Vaduvatha, Prashant R. Chandra, Jiazhen Zheng, Hugh McEvoy Walsh, Weihuang Wang, Abhishek Agarwal
  • Publication number: 20240064215
    Abstract: Compressing connection state information for a network connection including receiving an input bitmap having a sequence of bits describing transmit states and receive states; partitioning the input bitmap into a plurality of equal size blocks; partitioning each of the blocks into a plurality of equal sized sectors; generating a block valid sequence indicating the blocks having at least one bit set; generating, for each block having at least one bit set, a sector information sequence, the sector information sequence indicating, for the corresponding block, the sectors that have at least one bit set and an encoding type for each sector; and generating one or more symbols by encoding each sector that has at least one bit set.
    Type: Application
    Filed: May 22, 2023
    Publication date: February 22, 2024
    Inventors: Srinivas Vaduvatha, Weiwei Jiang, Prashant Chandra, Opeoluwa Oladipo, Jiazhen Zheng, Hugh McEvoy Walsh, Weihuang Wang, Abhishek Agarwal
  • Publication number: 20240045800
    Abstract: Aspects of the disclosure are directed to high performance connection cache eviction for reliable transport protocols in data center networking. Connection priorities for connection entries are determined to store the connection entries in a cache based on their connection priority. During cache eviction, the connection entries with a lowest connection priority are evicted from the cache. Cache eviction can be achieved with low latency at a high rate.
    Type: Application
    Filed: August 8, 2022
    Publication date: February 8, 2024
    Inventors: Abhishek Agarwal, Jiazhen Zheng, Srinivas Vaduvatha, Weihuang Wang, Hugh McEvoy Walsh, Weiwei Jiang, Ajay Venkatesan, Prashant R. Chandra
  • Publication number: 20230394082
    Abstract: A hash table system, including a plurality of hash tables, associated with respective hash functions, for storing key-value pairs; an overflow memory for storing key-value pairs moved from the hash tables due to collision; and an arbiter for arbitrating among commands including update commands, match commands, and rehash commands, wherein for each system clock cycle, the arbiter selects as a selected command one of an update command, a match command, or a rehash command, and wherein the hash table system completes execution of each selected command within a bounded number of system clock cycles.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Inventors: Weiwei Jiang, Srinivas Vaduvatha, Prashant R. Chandra, Jiazhen Zheng, Hugh McEvoy Walsh, Weihuang Wang, Abhishek Agarwal
  • Publication number: 20230393987
    Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.
    Type: Application
    Filed: June 7, 2022
    Publication date: December 7, 2023
    Inventors: Jiazhen Zheng, Srinivas Vaduvatha, Hugh McEvoy Walsh, Prashant R. Chandra, Abhishek Agarwal, Weihuang Wang, Weiwei Jiang
  • Publication number: 20230318976
    Abstract: A flow rate control method for solicited data communications includes receiving, at a first node of a communications network, a request-to-send (RTS) signal from a second node of the communications network, the RTS signal indicating a size of a solicited data transmission of the second node, determining, by the first node, whether a rate-limiting counter is above zero, wherein the rate-limiting counter is programmed to increase at a programmed rate and in response to the rate-limiting counter being above zero, scheduling, by the first node, a clear-to-send (CTS) signal to be sent from the first node to the second node over the communications network, and subtracting, by the first node, a value corresponding to the size of the solicited data transmission of the second node from the rate-limiting counter.
    Type: Application
    Filed: April 5, 2022
    Publication date: October 5, 2023
    Inventors: Abhishek Agarwal, Ye Tang, Sean Clark, Sarin Thomas, Hugh McEvoy Walsh, Xiyu Wang