Abstract: The present invention provides two approaches for eliminating a keyhole problem associated with an azimuth-elevation gimbal antenna which is a problem that occurs when the antennae is tracking a satellite vehicle that is substantially directly overhead, i.e., the satellite vehicle is near the zenith position. At such a point, the azimuth motor of the gimbal antenna must turn very rapidly when the satellite passes through such near zenith position. A first approach involves tilting up one of the elevation axis joints when the antenna points at or near its zenith position such that the pointing angle may be altered by a predetermined angle, for example around 0.5° to 1°, from the zenith position. A second approach involves tilting the secondary reflector of the cassegrain antenna such that the pointing direction of the antenna may be altered by a predetermined angle.

Abstract: A complimentary switched amplifier transceiver (10) is provided which offers performance advantages and reduces system complexity over conventional half-duplex transceivers by using complimentary switched amplifiers for eliminating switches. Power output to a channel transition (31) from a transmit amplifier (26) is not degraded by a switch insertion loss in a transmit mode. Receiver noise figure is not degraded due to the switch insertion loss from the channel transition (31) to a receive amplifier (27). Switch devices and their associated control lines are eliminated, reducing circuit complexity for complimentary switched amplifier circuits such as a combined amplifier switch (12) and a first bi-directional amplifier (22).

Abstract: A microwave monolithic integrated circuit (MMIC) RF-generated bias circuit and method includes an input for receiving an RF signal. A rectifier coupled to the input and to electrical ground produces a rectified RF signal in response. A voltage divider coupled to the rectifier and to the electrical ground receives the rectified RF signal and produces a DC voltage therefrom. An output is coupled to the voltage divider for applying the DC voltage to a MMIC field effect transistor (FET) for biasing. No separate bias battery is required, and efficiency is optimized because the generated bias voltage increases to the point where the amplifier voltage begins to decrease, which in turn reduces the generated bias voltage. The derived bias voltage may be used to control other circuits (e.g., other amplifiers, oscillators, mixers, etc.) which require detection of RF presence.

Abstract: A digital adjustable phase modulator and method includes a first circuit path and a second circuit path for a signal. A fixed bias voltage is coupled to the first circuit path and to the second circuit path which respectively include first and second active variable reactance components such as varactor diodes. The first circuit path and the second circuit path further include chip capacitors to provide a DC block for first and second MMIC single pole double throw switches, and transmission lines for the signal have a length of one-fourth of a wavelength of the signal to provide an RF short. A control voltage is coupled to the first and second varactor diodes such that the capacitances across the first and second varactor diodes changes, resulting in a phase difference between the signal traversing the first circuit path relative to the signal traversing the second circuit path.

Abstract: Microwave parallel coupled line filters with direct taps having improved rejection of undesired signals near the pass-band are disclosed. Improved rejection is achieved by controlling the transmission zeros created by the input and output direct taps. Performance is comparable to parallel coupled line filters having substantially more coupling sections. The method involves shifting the transmission zeros by changing the position of the direct taps along the resonator or changing the impedance of the open-circuited stub associated with each tap. Impedance transformers can be used to match back to the source and load impedances.

Abstract: An apparatus for providing electronically tunable biphase modulation including an input and a first switch having a first output, a second output and a first input coupled to the input. The first switch couples the first input to either the first output or to the second output in response to a modulating signal. The apparatus also includes a first signal path having a first phase shift and a second signal path having a second phase shift different than the first phase shift. The first signal path is coupled to the first output and the second signal path is coupled to the second output. The apparatus also includes a second switch having a first input coupled to the first signal path, a second input coupled to the second signal path and a terminal output.

Abstract: A non-hermetic, three-dimensional, microwave semiconductor device carrier with integral waveguide couplers is disclosed. A molded plastic substrate having a suitable dielectric constant and varying thicknesses comprises plated conductors and locations for receiving GaAs MMIC's. MMIC's are mounted to a metal backplate and die bonded to the plated conductors. The waveguide couplers are integrally molded as part of the carrier substrate, and comprise plated through cylindrical members. Signals from a waveguide cavity are coupled to the MMIC's by inserting the waveguide couplers into a waveguide port. The carrier and integral waveguide coupler together with a plated molded cover forms a non-hermetic package providing pseudo-shielding cavities about the resident multiple semiconductor GaAs die. Transmission line impedance control is enhanced varying the substrate thickness on a per conductor basis. Frequency of operation exceeds 12 gigahertz.

Abstract: Inductorless bias networks include a bias circuit having a bias return path which is coupled to and biases a variable impedance device in a relatively nonconductive state. Another bias circuit including a FET renders the variable impedance device relatively conductive in response to control signals so that one port is coupled to another port, for instance.

Abstract: A semiconductor packaging configuration is described in which a heat sink is bonded to a semiconductor chip or die and a conductor is bonded to the die and a metalized ceramic insulating body for achieving optimum heat transfer. Additionally, electrical matching and/or reduction of parasitic elements is achieved by a low pass matching filter comprising the capacitance of the chip or die, the capacitance of the metalized ceramic body and the inductance of the electrical conductor. This provides a significant improvement in power handling capabilities of a semiconductor chip or die operating at elevated temperatures and gigahertz frequencies. The electrical conductor geometry and its bonds provide a reduction of the thermal resistance of the package and also provides the inductance which forms part of the low pass matching filter.